diff mbox series

[net-next,1/1] drivers: net: dsa: qca8k: fix sgmii with some specific switch revision

Message ID 20210920164745.30162-2-ansuelsmth@gmail.com (mailing list archive)
State Changes Requested
Delegated to: Netdev Maintainers
Headers show
Series Sgmii fix for qca8k qca8327 switch | expand

Checks

Context Check Description
netdev/cover_letter success Link
netdev/fixes_present success Link
netdev/patch_count success Link
netdev/tree_selection success Clearly marked for net-next
netdev/subject_prefix success Link
netdev/cc_maintainers success CCed 7 of 7 maintainers
netdev/source_inline success Was 0 now: 0
netdev/verify_signedoff success Link
netdev/module_param success Was 0 now: 0
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/verify_fixes success Link
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 16 lines checked
netdev/build_allmodconfig_warn success Errors and warnings before: 0 this patch: 0
netdev/header_inline success Link

Commit Message

Christian Marangi Sept. 20, 2021, 4:47 p.m. UTC
Enable sgmii pll, tx driver and rx chain only on switch revision 1. This
is not needed on later revision and with qca8327 cause the sgmii
connection to not work at all. This is a case with some router that use
the qca8327 switch and have the cpu port 0 using a sgmii connection.
Without this, routers with this specific configuration won't work as the
ports won't be able to communicate with the cpu port with the result of
no traffic.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/net/dsa/qca8k.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

Comments

Andrey Jr. Melnikov Sept. 21, 2021, 3:02 p.m. UTC | #1
In gmane.linux.network Ansuel Smith <ansuelsmth@gmail.com> wrote:
> Enable sgmii pll, tx driver and rx chain only on switch revision 1. This
> is not needed on later revision and with qca8327 cause the sgmii
> connection to not work at all. This is a case with some router that use
> the qca8327 switch and have the cpu port 0 using a sgmii connection.
> Without this, routers with this specific configuration won't work as the
> ports won't be able to communicate with the cpu port with the result of
> no traffic.

> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  drivers/net/dsa/qca8k.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)

> diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> index bda5a9bf4f52..efeed8094865 100644
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -1227,8 +1227,14 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
>                 if (ret)
>                         return;
>  
> -               val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
> -                       QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;
> +               /* SGMII PLL, TX driver and RX chain is only needed in
> +                * switch revision 1, later revision doesn't need this.
> +                */
> +               if (priv->switch_revision == 1)
> +                       val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
> +                              QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;
> +               else
> +                       val |= QCA8K_SGMII_EN_SD;
maybe better

+               val |= QCA8K_SGMII_EN_SD;
+               /* SGMII PLL, TX driver and RX chain is only needed in
+                * switch revision 1, later revision doesn't need this.
+                */
+               if (priv->switch_revision == 1)
+                       val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
+                              QCA8K_SGMII_EN_TX;

without else branch ?

>                 if (dsa_is_cpu_port(ds, port)) {
>                         /* CPU port, we're talking to the CPU MAC, be a PHY */
diff mbox series

Patch

diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index bda5a9bf4f52..efeed8094865 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -1227,8 +1227,14 @@  qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
 		if (ret)
 			return;
 
-		val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
-			QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;
+		/* SGMII PLL, TX driver and RX chain is only needed in
+		 * switch revision 1, later revision doesn't need this.
+		 */
+		if (priv->switch_revision == 1)
+			val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
+			       QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;
+		else
+			val |= QCA8K_SGMII_EN_SD;
 
 		if (dsa_is_cpu_port(ds, port)) {
 			/* CPU port, we're talking to the CPU MAC, be a PHY */