| Message ID | 20210922212049.19851-4-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | RZ/G2L SMARC EVK enable ADC and CAN interfaces | expand |
Hi Prabhakar, On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Enable CANFD on RZ/G2L SMARC platform. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > @@ -139,6 +153,32 @@ > pinctrl-0 = <&sound_clk_pins>; > pinctrl-names = "default"; > > + can0_pins: can0 { > + pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */ > + <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */ > + }; > + > + /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ > + can0-stb { > + gpio-hog; > + gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>; > + output-high; While this drives the STB signal correctly, I find it confusing. According to the datasheet, the STB signal is active-high, so it has to be pulled low to disable standby. So to reflect the meaning of the STB line, I would write: gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>; output-low; > + line-name = "can0_stb"; > + }; > + > + can1_pins: can1 { > + pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */ > + <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */ > + }; > + > + /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ > + can1-stb { > + gpio-hog; > + gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>; > + output-high; Likewise. > + line-name = "can1_stb"; > + }; > + The rest looks good to me, so with the above fixed: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
Hi Geert, Thank you for the review. On Fri, Sep 24, 2021 at 10:07 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > Enable CANFD on RZ/G2L SMARC platform. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > > @@ -139,6 +153,32 @@ > > pinctrl-0 = <&sound_clk_pins>; > > pinctrl-names = "default"; > > > > + can0_pins: can0 { > > + pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */ > > + <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */ > > + }; > > + > > + /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ > > + can0-stb { > > + gpio-hog; > > + gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>; > > + output-high; > > While this drives the STB signal correctly, I find it confusing. > According to the datasheet, the STB signal is active-high, so it has to > be pulled low to disable standby. agreed. > So to reflect the meaning of the STB line, I would write: > > gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>; > output-low; > will re-spin the patch 3/3 as above. Cheers, Prabhakar > > + line-name = "can0_stb"; > > + }; > > + > > + can1_pins: can1 { > > + pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */ > > + <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */ > > + }; > > + > > + /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ > > + can1-stb { > > + gpio-hog; > > + gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>; > > + output-high; > > Likewise. > > > + line-name = "can1_stb"; > > + }; > > + > > The rest looks good to me, so with the above fixed: > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi index e895f6e7fa28..5dc4fff33076 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi @@ -80,6 +80,20 @@ clock-frequency = <12288000>; }; +&canfd { + pinctrl-0 = <&can0_pins &can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + &ehci0 { dr_mode = "otg"; status = "okay"; @@ -139,6 +153,32 @@ pinctrl-0 = <&sound_clk_pins>; pinctrl-names = "default"; + can0_pins: can0 { + pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */ + <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */ + }; + + /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */ + can0-stb { + gpio-hog; + gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>; + output-high; + line-name = "can0_stb"; + }; + + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */ + <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */ + }; + + /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ + can1-stb { + gpio-hog; + gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>; + output-high; + line-name = "can1_stb"; + }; + i2c0_pins: i2c0 { pins = "RIIC0_SDA", "RIIC0_SCL"; input-enable;