| Message ID | 20210824043435.23190-4-shawn.guo@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Add missing A2NoC QoS clocks for SDM660 interconnect driver | expand |
Il 24/08/21 06:34, Shawn Guo ha scritto: > It adds the missing a2noc clocks required for QoS registers programming > per downstream kernel[1]. > > [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
On 24.08.21 7:34, Shawn Guo wrote: > It adds the missing a2noc clocks required for QoS registers programming > per downstream kernel[1]. > > [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> > --- > arch/arm64/boot/dts/qcom/sdm630.dtsi | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index 9153e6616ba4..9c7f87e42fcc 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -654,9 +654,20 @@ > compatible = "qcom,sdm660-a2noc"; > reg = <0x01704000 0xc100>; > #interconnect-cells = <1>; > - clock-names = "bus", "bus_a"; > + clock-names = "bus", > + "bus_a", > + "ipa", > + "ufs_axi", > + "aggre2_ufs_axi", > + "aggre2_usb3_axi", > + "cfg_noc_usb2_axi"; > clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, > - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; > + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, > + <&rpmcc RPM_SMD_IPA_CLK>, > + <&gcc GCC_UFS_AXI_CLK>, > + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, > + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, > + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; > }; > > mnoc: interconnect@1745000 { >
On Tue, 24 Aug 2021 12:34:35 +0800, Shawn Guo wrote: > It adds the missing a2noc clocks required for QoS registers programming > per downstream kernel[1]. > > [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 > > Applied, thanks! [3/3] arm64: dts: qcom: sdm630: Add missing a2noc qos clocks commit: 1878f4b7ec9ed013da8a7efb63fed1fbae0215ae Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 9153e6616ba4..9c7f87e42fcc 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -654,9 +654,20 @@ compatible = "qcom,sdm660-a2noc"; reg = <0x01704000 0xc100>; #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; + clock-names = "bus", + "bus_a", + "ipa", + "ufs_axi", + "aggre2_ufs_axi", + "aggre2_usb3_axi", + "cfg_noc_usb2_axi"; clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>, + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; }; mnoc: interconnect@1745000 {
It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)