| Message ID | 20210924165322.1.Ib7e63ae17e827ce0636a09d5dec9796043e4f80a@changeid (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: sc7180: Factor out ti-sn65dsi86 support | expand |
Quoting Philip Chen (2021-09-24 16:54:13) > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > new file mode 100644 > index 000000000000..7b1034a5a8e9 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > @@ -0,0 +1,87 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge > + * > + * Copyright 2021 Google LLC. > + */ > + > +&dsi0_out { > + remote-endpoint = <&sn65dsi86_in>; > + data-lanes = <0 1 2 3>; > +}; > + > +&edp_brij_i2c { > + sn65dsi86_bridge: bridge@2d { > + compatible = "ti,sn65dsi86"; > + reg = <0x2d>; > + pinctrl-names = "default"; > + pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; Why not move edp_brij_en as well? I think you want to reuse the node name for the other bridge, but it doesn't make sense unless that other patch is part of this series. > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-parent = <&tlmm>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > + > + enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
On Fri 24 Sep 18:54 CDT 2021, Philip Chen wrote: > Factor out ti-sn65dsi86 edp bridge as a separate dts fragment. > This helps us introduce the second source edp bridge later. > I'd prefer to see the second patch in this series to conclude that this is the right approach. Regards, Bjorn > Signed-off-by: Philip Chen <philipchen@chromium.org> > --- > > .../boot/dts/qcom/sc7180-trogdor-coachz.dtsi | 1 + > .../boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 1 + > .../boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 1 + > .../arm64/boot/dts/qcom/sc7180-trogdor-r1.dts | 1 + > .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 87 +++++++++++++++++++ > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 81 ----------------- > 6 files changed, 91 insertions(+), 81 deletions(-) > create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > index a758e4d22612..1d13fba3bd2f 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > @@ -11,6 +11,7 @@ > ap_h1_spi: &spi0 {}; > > #include "sc7180-trogdor.dtsi" > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > /* Deleted nodes from trogdor.dtsi */ > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > index 00535aaa43c9..27b26a782af9 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > @@ -11,6 +11,7 @@ > ap_h1_spi: &spi0 {}; > > #include "sc7180-trogdor.dtsi" > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > &ap_sar_sensor { > semtech,cs0-ground; > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > index a246dbd74cc1..e7c7cad14989 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > @@ -11,6 +11,7 @@ > ap_h1_spi: &spi0 {}; > > #include "sc7180-trogdor.dtsi" > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > / { > thermal-zones { > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > index 2b522f9e0d8f..457c25499863 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > @@ -13,6 +13,7 @@ > ap_h1_spi: &spi0 {}; > > #include "sc7180-trogdor.dtsi" > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > / { > model = "Google Trogdor (rev1+)"; > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > new file mode 100644 > index 000000000000..7b1034a5a8e9 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > @@ -0,0 +1,87 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge > + * > + * Copyright 2021 Google LLC. > + */ > + > +&dsi0_out { > + remote-endpoint = <&sn65dsi86_in>; > + data-lanes = <0 1 2 3>; > +}; > + > +&edp_brij_i2c { > + sn65dsi86_bridge: bridge@2d { > + compatible = "ti,sn65dsi86"; > + reg = <0x2d>; > + pinctrl-names = "default"; > + pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-parent = <&tlmm>; > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > + > + enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; > + > + vpll-supply = <&pp1800_edp_vpll>; > + vccio-supply = <&pp1800_brij_vccio>; > + vcca-supply = <&pp1200_brij>; > + vcc-supply = <&pp1200_brij>; > + > + clocks = <&rpmhcc RPMH_LN_BB_CLK3>; > + clock-names = "refclk"; > + > + no-hpd; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + sn65dsi86_in: endpoint { > + remote-endpoint = <&dsi0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + sn65dsi86_out: endpoint { > + data-lanes = <0 1>; > + remote-endpoint = <&panel_in_edp>; > + }; > + }; > + }; > + > + aux-bus { > + panel: panel { > + /* Compatible will be filled in per-board */ > + power-supply = <&pp3300_dx_edp>; > + backlight = <&backlight>; > + hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; > + > + port { > + panel_in_edp: endpoint { > + remote-endpoint = <&sn65dsi86_out>; > + }; > + }; > + }; > + }; > + }; > +}; > + > +&tlmm { > + edp_brij_irq: edp-brij-irq { > + pinmux { > + pins = "gpio11"; > + function = "gpio"; > + }; > + > + pinconf { > + pins = "gpio11"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > index 0f2b3c00e434..5ad3f15652d5 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > @@ -602,15 +602,6 @@ &camcc { > &dsi0 { > status = "okay"; > vdda-supply = <&vdda_mipi_dsi0_1p2>; > - > - ports { > - port@1 { > - endpoint { > - remote-endpoint = <&sn65dsi86_in>; > - data-lanes = <0 1 2 3>; > - }; > - }; > - }; > }; > > &dsi_phy { > @@ -621,65 +612,6 @@ &dsi_phy { > edp_brij_i2c: &i2c2 { > status = "okay"; > clock-frequency = <400000>; > - > - sn65dsi86_bridge: bridge@2d { > - compatible = "ti,sn65dsi86"; > - reg = <0x2d>; > - pinctrl-names = "default"; > - pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-parent = <&tlmm>; > - interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > - > - enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; > - > - vpll-supply = <&pp1800_edp_vpll>; > - vccio-supply = <&pp1800_brij_vccio>; > - vcca-supply = <&pp1200_brij>; > - vcc-supply = <&pp1200_brij>; > - > - clocks = <&rpmhcc RPMH_LN_BB_CLK3>; > - clock-names = "refclk"; > - > - no-hpd; > - > - ports { > - #address-cells = <1>; > - #size-cells = <0>; > - > - port@0 { > - reg = <0>; > - sn65dsi86_in: endpoint { > - remote-endpoint = <&dsi0_out>; > - }; > - }; > - > - port@1 { > - reg = <1>; > - sn65dsi86_out: endpoint { > - data-lanes = <0 1>; > - remote-endpoint = <&panel_in_edp>; > - }; > - }; > - }; > - > - aux-bus { > - panel: panel { > - /* Compatible will be filled in per-board */ > - power-supply = <&pp3300_dx_edp>; > - backlight = <&backlight>; > - hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; > - > - port { > - panel_in_edp: endpoint { > - remote-endpoint = <&sn65dsi86_out>; > - }; > - }; > - }; > - }; > - }; > }; > > ap_sar_sensor_i2c: &i2c5 { > @@ -1245,19 +1177,6 @@ pinconf { > }; > }; > > - edp_brij_irq: edp-brij-irq { > - pinmux { > - pins = "gpio11"; > - function = "gpio"; > - }; > - > - pinconf { > - pins = "gpio11"; > - drive-strength = <2>; > - bias-pull-down; > - }; > - }; > - > en_pp3300_codec: en-pp3300-codec { > pinmux { > pins = "gpio83"; > -- > 2.33.0.685.g46640cef36-goog >
Hi On Mon, Sep 27, 2021 at 12:59 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Philip Chen (2021-09-24 16:54:13) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > new file mode 100644 > > index 000000000000..7b1034a5a8e9 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > @@ -0,0 +1,87 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge > > + * > > + * Copyright 2021 Google LLC. > > + */ > > + > > +&dsi0_out { > > + remote-endpoint = <&sn65dsi86_in>; > > + data-lanes = <0 1 2 3>; > > +}; > > + > > +&edp_brij_i2c { > > + sn65dsi86_bridge: bridge@2d { > > + compatible = "ti,sn65dsi86"; > > + reg = <0x2d>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; > > Why not move edp_brij_en as well? I think you want to reuse the node > name for the other bridge, but it doesn't make sense unless that other > patch is part of this series. Yes, I posted v2 with the other patch enabling the second source edp bridge. > > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-parent = <&tlmm>; > > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > > + > > + enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
Hi Bjorn, On Mon, Sep 27, 2021 at 3:07 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Fri 24 Sep 18:54 CDT 2021, Philip Chen wrote: > > > Factor out ti-sn65dsi86 edp bridge as a separate dts fragment. > > This helps us introduce the second source edp bridge later. > > > > I'd prefer to see the second patch in this series to conclude that this > is the right approach. Sure, I posted v2 with the second patch enabling the second source edp bridge. PTAL. > > Regards, > Bjorn > > > Signed-off-by: Philip Chen <philipchen@chromium.org> > > --- > > > > .../boot/dts/qcom/sc7180-trogdor-coachz.dtsi | 1 + > > .../boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 1 + > > .../boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 1 + > > .../arm64/boot/dts/qcom/sc7180-trogdor-r1.dts | 1 + > > .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 87 +++++++++++++++++++ > > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 81 ----------------- > > 6 files changed, 91 insertions(+), 81 deletions(-) > > create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > > index a758e4d22612..1d13fba3bd2f 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi > > @@ -11,6 +11,7 @@ > > ap_h1_spi: &spi0 {}; > > > > #include "sc7180-trogdor.dtsi" > > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > > > /* Deleted nodes from trogdor.dtsi */ > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > > index 00535aaa43c9..27b26a782af9 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi > > @@ -11,6 +11,7 @@ > > ap_h1_spi: &spi0 {}; > > > > #include "sc7180-trogdor.dtsi" > > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > > > &ap_sar_sensor { > > semtech,cs0-ground; > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > > index a246dbd74cc1..e7c7cad14989 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi > > @@ -11,6 +11,7 @@ > > ap_h1_spi: &spi0 {}; > > > > #include "sc7180-trogdor.dtsi" > > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > > > / { > > thermal-zones { > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > > index 2b522f9e0d8f..457c25499863 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts > > @@ -13,6 +13,7 @@ > > ap_h1_spi: &spi0 {}; > > > > #include "sc7180-trogdor.dtsi" > > +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" > > > > / { > > model = "Google Trogdor (rev1+)"; > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > new file mode 100644 > > index 000000000000..7b1034a5a8e9 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi > > @@ -0,0 +1,87 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge > > + * > > + * Copyright 2021 Google LLC. > > + */ > > + > > +&dsi0_out { > > + remote-endpoint = <&sn65dsi86_in>; > > + data-lanes = <0 1 2 3>; > > +}; > > + > > +&edp_brij_i2c { > > + sn65dsi86_bridge: bridge@2d { > > + compatible = "ti,sn65dsi86"; > > + reg = <0x2d>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + > > + interrupt-parent = <&tlmm>; > > + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > > + > > + enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; > > + > > + vpll-supply = <&pp1800_edp_vpll>; > > + vccio-supply = <&pp1800_brij_vccio>; > > + vcca-supply = <&pp1200_brij>; > > + vcc-supply = <&pp1200_brij>; > > + > > + clocks = <&rpmhcc RPMH_LN_BB_CLK3>; > > + clock-names = "refclk"; > > + > > + no-hpd; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + sn65dsi86_in: endpoint { > > + remote-endpoint = <&dsi0_out>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + sn65dsi86_out: endpoint { > > + data-lanes = <0 1>; > > + remote-endpoint = <&panel_in_edp>; > > + }; > > + }; > > + }; > > + > > + aux-bus { > > + panel: panel { > > + /* Compatible will be filled in per-board */ > > + power-supply = <&pp3300_dx_edp>; > > + backlight = <&backlight>; > > + hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; > > + > > + port { > > + panel_in_edp: endpoint { > > + remote-endpoint = <&sn65dsi86_out>; > > + }; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&tlmm { > > + edp_brij_irq: edp-brij-irq { > > + pinmux { > > + pins = "gpio11"; > > + function = "gpio"; > > + }; > > + > > + pinconf { > > + pins = "gpio11"; > > + drive-strength = <2>; > > + bias-pull-down; > > + }; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > > index 0f2b3c00e434..5ad3f15652d5 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi > > @@ -602,15 +602,6 @@ &camcc { > > &dsi0 { > > status = "okay"; > > vdda-supply = <&vdda_mipi_dsi0_1p2>; > > - > > - ports { > > - port@1 { > > - endpoint { > > - remote-endpoint = <&sn65dsi86_in>; > > - data-lanes = <0 1 2 3>; > > - }; > > - }; > > - }; > > }; > > > > &dsi_phy { > > @@ -621,65 +612,6 @@ &dsi_phy { > > edp_brij_i2c: &i2c2 { > > status = "okay"; > > clock-frequency = <400000>; > > - > > - sn65dsi86_bridge: bridge@2d { > > - compatible = "ti,sn65dsi86"; > > - reg = <0x2d>; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; > > - gpio-controller; > > - #gpio-cells = <2>; > > - > > - interrupt-parent = <&tlmm>; > > - interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; > > - > > - enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; > > - > > - vpll-supply = <&pp1800_edp_vpll>; > > - vccio-supply = <&pp1800_brij_vccio>; > > - vcca-supply = <&pp1200_brij>; > > - vcc-supply = <&pp1200_brij>; > > - > > - clocks = <&rpmhcc RPMH_LN_BB_CLK3>; > > - clock-names = "refclk"; > > - > > - no-hpd; > > - > > - ports { > > - #address-cells = <1>; > > - #size-cells = <0>; > > - > > - port@0 { > > - reg = <0>; > > - sn65dsi86_in: endpoint { > > - remote-endpoint = <&dsi0_out>; > > - }; > > - }; > > - > > - port@1 { > > - reg = <1>; > > - sn65dsi86_out: endpoint { > > - data-lanes = <0 1>; > > - remote-endpoint = <&panel_in_edp>; > > - }; > > - }; > > - }; > > - > > - aux-bus { > > - panel: panel { > > - /* Compatible will be filled in per-board */ > > - power-supply = <&pp3300_dx_edp>; > > - backlight = <&backlight>; > > - hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; > > - > > - port { > > - panel_in_edp: endpoint { > > - remote-endpoint = <&sn65dsi86_out>; > > - }; > > - }; > > - }; > > - }; > > - }; > > }; > > > > ap_sar_sensor_i2c: &i2c5 { > > @@ -1245,19 +1177,6 @@ pinconf { > > }; > > }; > > > > - edp_brij_irq: edp-brij-irq { > > - pinmux { > > - pins = "gpio11"; > > - function = "gpio"; > > - }; > > - > > - pinconf { > > - pins = "gpio11"; > > - drive-strength = <2>; > > - bias-pull-down; > > - }; > > - }; > > - > > en_pp3300_codec: en-pp3300-codec { > > pinmux { > > pins = "gpio83"; > > -- > > 2.33.0.685.g46640cef36-goog > >
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi index a758e4d22612..1d13fba3bd2f 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi @@ -11,6 +11,7 @@ ap_h1_spi: &spi0 {}; #include "sc7180-trogdor.dtsi" +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" /* Deleted nodes from trogdor.dtsi */ diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi index 00535aaa43c9..27b26a782af9 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi @@ -11,6 +11,7 @@ ap_h1_spi: &spi0 {}; #include "sc7180-trogdor.dtsi" +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" &ap_sar_sensor { semtech,cs0-ground; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi index a246dbd74cc1..e7c7cad14989 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi @@ -11,6 +11,7 @@ ap_h1_spi: &spi0 {}; #include "sc7180-trogdor.dtsi" +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" / { thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts index 2b522f9e0d8f..457c25499863 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts @@ -13,6 +13,7 @@ ap_h1_spi: &spi0 {}; #include "sc7180-trogdor.dtsi" +#include "sc7180-trogdor-ti-sn65dsi86.dtsi" / { model = "Google Trogdor (rev1+)"; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi new file mode 100644 index 000000000000..7b1034a5a8e9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge + * + * Copyright 2021 Google LLC. + */ + +&dsi0_out { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <0 1 2 3>; +}; + +&edp_brij_i2c { + sn65dsi86_bridge: bridge@2d { + compatible = "ti,sn65dsi86"; + reg = <0x2d>; + pinctrl-names = "default"; + pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&tlmm>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; + + vpll-supply = <&pp1800_edp_vpll>; + vccio-supply = <&pp1800_brij_vccio>; + vcca-supply = <&pp1200_brij>; + vcc-supply = <&pp1200_brij>; + + clocks = <&rpmhcc RPMH_LN_BB_CLK3>; + clock-names = "refclk"; + + no-hpd; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&panel_in_edp>; + }; + }; + }; + + aux-bus { + panel: panel { + /* Compatible will be filled in per-board */ + power-supply = <&pp3300_dx_edp>; + backlight = <&backlight>; + hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; + + port { + panel_in_edp: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + }; + }; +}; + +&tlmm { + edp_brij_irq: edp-brij-irq { + pinmux { + pins = "gpio11"; + function = "gpio"; + }; + + pinconf { + pins = "gpio11"; + drive-strength = <2>; + bias-pull-down; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 0f2b3c00e434..5ad3f15652d5 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -602,15 +602,6 @@ &camcc { &dsi0 { status = "okay"; vdda-supply = <&vdda_mipi_dsi0_1p2>; - - ports { - port@1 { - endpoint { - remote-endpoint = <&sn65dsi86_in>; - data-lanes = <0 1 2 3>; - }; - }; - }; }; &dsi_phy { @@ -621,65 +612,6 @@ &dsi_phy { edp_brij_i2c: &i2c2 { status = "okay"; clock-frequency = <400000>; - - sn65dsi86_bridge: bridge@2d { - compatible = "ti,sn65dsi86"; - reg = <0x2d>; - pinctrl-names = "default"; - pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>; - gpio-controller; - #gpio-cells = <2>; - - interrupt-parent = <&tlmm>; - interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; - - enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>; - - vpll-supply = <&pp1800_edp_vpll>; - vccio-supply = <&pp1800_brij_vccio>; - vcca-supply = <&pp1200_brij>; - vcc-supply = <&pp1200_brij>; - - clocks = <&rpmhcc RPMH_LN_BB_CLK3>; - clock-names = "refclk"; - - no-hpd; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - sn65dsi86_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - - port@1 { - reg = <1>; - sn65dsi86_out: endpoint { - data-lanes = <0 1>; - remote-endpoint = <&panel_in_edp>; - }; - }; - }; - - aux-bus { - panel: panel { - /* Compatible will be filled in per-board */ - power-supply = <&pp3300_dx_edp>; - backlight = <&backlight>; - hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>; - - port { - panel_in_edp: endpoint { - remote-endpoint = <&sn65dsi86_out>; - }; - }; - }; - }; - }; }; ap_sar_sensor_i2c: &i2c5 { @@ -1245,19 +1177,6 @@ pinconf { }; }; - edp_brij_irq: edp-brij-irq { - pinmux { - pins = "gpio11"; - function = "gpio"; - }; - - pinconf { - pins = "gpio11"; - drive-strength = <2>; - bias-pull-down; - }; - }; - en_pp3300_codec: en-pp3300-codec { pinmux { pins = "gpio83";
Factor out ti-sn65dsi86 edp bridge as a separate dts fragment. This helps us introduce the second source edp bridge later. Signed-off-by: Philip Chen <philipchen@chromium.org> --- .../boot/dts/qcom/sc7180-trogdor-coachz.dtsi | 1 + .../boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 1 + .../boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 1 + .../arm64/boot/dts/qcom/sc7180-trogdor-r1.dts | 1 + .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 87 +++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 81 ----------------- 6 files changed, 91 insertions(+), 81 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi