| Message ID | 20211002005954.1367653-1-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| Headers | show |
| Series | i.MX8MM GPC improvements and BLK_CTRL driver | expand |
On Sat, Oct 02, 2021 at 02:59:36AM +0200, Lucas Stach wrote: > Hi all, > > just another respin, with the struct naming issues reported by Adam > fixed and acks and reviews applied to the DT binding patches. > > Regards, > Lucas > > Frieder Schrempf (1): > arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core > > Lucas Stach (15): > Revert "soc: imx: gpcv2: move reset assert after requesting domain > power up" > soc: imx: gpcv2: add lockdep annotation > soc: imx: gpcv2: add domain option to keep domain clocks enabled > soc: imx: gpcv2: keep i.MX8M* bus clocks enabled > soc: imx: gpcv2: support system suspend/resume > dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl > dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains > soc: imx: add i.MX8M blk-ctrl driver > dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl > dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains > soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl > arm64: dts: imx8mm: add GPC node > arm64: dts: imx8mm: put USB controllers into power-domains > arm64: dts: imx8mm: add VPU blk-ctrl > arm64: dts: imx8mm: add DISP blk-ctrl Applied all, thanks! > > Marek Vasut (2): > soc: imx: gpcv2: Turn domain->pgc into bitfield > soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU > domain These two were already picked up separately. Shawn
Hi all, just another respin, with the struct naming issues reported by Adam fixed and acks and reviews applied to the DT binding patches. Regards, Lucas Frieder Schrempf (1): arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core Lucas Stach (15): Revert "soc: imx: gpcv2: move reset assert after requesting domain power up" soc: imx: gpcv2: add lockdep annotation soc: imx: gpcv2: add domain option to keep domain clocks enabled soc: imx: gpcv2: keep i.MX8M* bus clocks enabled soc: imx: gpcv2: support system suspend/resume dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains soc: imx: add i.MX8M blk-ctrl driver dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl arm64: dts: imx8mm: add GPC node arm64: dts: imx8mm: put USB controllers into power-domains arm64: dts: imx8mm: add VPU blk-ctrl arm64: dts: imx8mm: add DISP blk-ctrl Marek Vasut (2): soc: imx: gpcv2: Turn domain->pgc into bitfield soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain .../soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml | 94 ++++ .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 76 +++ arch/arm64/boot/dts/freescale/imx8mm.dtsi | 180 ++++++ drivers/soc/imx/Makefile | 1 + drivers/soc/imx/gpcv2.c | 131 +++-- drivers/soc/imx/imx8m-blk-ctrl.c | 523 ++++++++++++++++++ include/dt-bindings/power/imx8mm-power.h | 9 + 7 files changed, 973 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml create mode 100644 drivers/soc/imx/imx8m-blk-ctrl.c