diff mbox series

[v1,1/2] dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280

Message ID 1630406202-3919-1-git-send-email-tdas@codeaurora.org (mailing list archive)
State Not Applicable
Headers show
Series [v1,1/2] dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 | expand

Commit Message

Taniya Das Aug. 31, 2021, 10:36 a.m. UTC 
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Add the LPASS clock IDs for
LPASS PIL client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
---
 .../bindings/clock/qcom,sc7280-lpasscc.yaml        | 69 ++++++++++++++++++++++
 include/dt-bindings/clock/qcom,lpass-sc7280.h      | 16 +++++
 2 files changed, 85 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
 create mode 100644 include/dt-bindings/clock/qcom,lpass-sc7280.h

Comments

Rob Herring (Arm) Sept. 1, 2021, 1:45 a.m. UTC | #1 
On Tue, Aug 31, 2021 at 04:06:41PM +0530, Taniya Das wrote:
> The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
> properties that are needed in a device tree. Add the LPASS clock IDs for
> LPASS PIL client to request for the clocks.
> 
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
>  .../bindings/clock/qcom,sc7280-lpasscc.yaml        | 69 ++++++++++++++++++++++
>  include/dt-bindings/clock/qcom,lpass-sc7280.h      | 16 +++++
>  2 files changed, 85 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,lpass-sc7280.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
> new file mode 100644
> index 0000000..7b62763
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm LPASS Core Clock Controller Binding for SC7280
> +
> +maintainers:
> +  - Taniya Das <tdas@codeaurora.org>
> +
> +description: |
> +  Qualcomm LPASS core clock control module which supports the clocks and
> +  power domains on SC7280.
> +
> +  See also:
> +  - dt-bindings/clock/qcom,lpass-sc7280.h
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sc7280-lpasscc
> +
> +  clocks:
> +    items:
> +      - description: gcc_cfg_noc_lpass_clk from GCC
> +
> +  clock-names:
> +    items:
> +      - const: iface
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  reg:
> +    minItems: 3

Don't need minItems equal to 'items' length.

> +    items:
> +      - description: LPASS qdsp6ss register
> +      - description: LPASS top-cc register
> +      - description: LPASS cc register
> +
> +  reg-names:
> +    items:
> +      - const: qdsp6ss
> +      - const: top_cc
> +      - const: cc
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> +    #include <dt-bindings/clock/qcom,lpass-sc7280.h>
> +    clock-controller@3000000 {
> +      compatible = "qcom,sc7280-lpasscc";
> +      reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>;
> +      reg-names = "qdsp6ss", "top_cc", "cc";
> +      clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
> +      clock-names = "iface";
> +      #clock-cells = <1>;
> +    };
> +...
> diff --git a/include/dt-bindings/clock/qcom,lpass-sc7280.h b/include/dt-bindings/clock/qcom,lpass-sc7280.h
> new file mode 100644
> index 0000000..a259463
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,lpass-sc7280.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license.

> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
> +#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
> +
> +#define LPASS_Q6SS_AHBM_CLK				0
> +#define LPASS_Q6SS_AHBS_CLK				1
> +#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK			2
> +#define LPASS_QDSP6SS_XO_CLK				3
> +#define LPASS_QDSP6SS_SLEEP_CLK				4
> +#define LPASS_QDSP6SS_CORE_CLK				5
> +
> +#endif
> -- 
> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
> of the Code Aurora Forum, hosted by the  Linux Foundation.
> 
>
Taniya Das Oct. 6, 2021, 1:39 a.m. UTC | #2 
Hello Rob,

Thanks for your review.

On 9/1/2021 7:15 AM, Rob Herring wrote:
> On Tue, Aug 31, 2021 at 04:06:41PM +0530, Taniya Das wrote:
>> The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
>> properties that are needed in a device tree. Add the LPASS clock IDs for
>> LPASS PIL client to request for the clocks.
>>
>> Signed-off-by: Taniya Das <tdas@codeaurora.org>
>> ---
>>   .../bindings/clock/qcom,sc7280-lpasscc.yaml        | 69 ++++++++++++++++++++++
>>   include/dt-bindings/clock/qcom,lpass-sc7280.h      | 16 +++++
>>   2 files changed, 85 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
>>   create mode 100644 include/dt-bindings/clock/qcom,lpass-sc7280.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
>> new file mode 100644
>> index 0000000..7b62763
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
>> @@ -0,0 +1,69 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm LPASS Core Clock Controller Binding for SC7280
>> +
>> +maintainers:
>> +  - Taniya Das <tdas@codeaurora.org>
>> +
>> +description: |
>> +  Qualcomm LPASS core clock control module which supports the clocks and
>> +  power domains on SC7280.
>> +
>> +  See also:
>> +  - dt-bindings/clock/qcom,lpass-sc7280.h
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - qcom,sc7280-lpasscc
>> +
>> +  clocks:
>> +    items:
>> +      - description: gcc_cfg_noc_lpass_clk from GCC
>> +
>> +  clock-names:
>> +    items:
>> +      - const: iface
>> +
>> +  '#clock-cells':
>> +    const: 1
>> +
>> +  reg:
>> +    minItems: 3
> 
> Don't need minItems equal to 'items' length.
> 
Next patch will fix this.

>> +    items:
>> +      - description: LPASS qdsp6ss register
>> +      - description: LPASS top-cc register
>> +      - description: LPASS cc register
>> +
>> +  reg-names:
>> +    items:
>> +      - const: qdsp6ss
>> +      - const: top_cc
>> +      - const: cc
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - clocks
>> +  - clock-names
>> +  - '#clock-cells'
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
>> +    #include <dt-bindings/clock/qcom,lpass-sc7280.h>
>> +    clock-controller@3000000 {
>> +      compatible = "qcom,sc7280-lpasscc";
>> +      reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>;
>> +      reg-names = "qdsp6ss", "top_cc", "cc";
>> +      clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
>> +      clock-names = "iface";
>> +      #clock-cells = <1>;
>> +    };
>> +...
>> diff --git a/include/dt-bindings/clock/qcom,lpass-sc7280.h b/include/dt-bindings/clock/qcom,lpass-sc7280.h
>> new file mode 100644
>> index 0000000..a259463
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/qcom,lpass-sc7280.h
>> @@ -0,0 +1,16 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
> 
> Dual license.
>
Yes, my bad, will fix it in the next patch.

>> +/*
>> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
>> + */
>> +
>> +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
>> +#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
>> +
>> +#define LPASS_Q6SS_AHBM_CLK				0
>> +#define LPASS_Q6SS_AHBS_CLK				1
>> +#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK			2
>> +#define LPASS_QDSP6SS_XO_CLK				3
>> +#define LPASS_QDSP6SS_SLEEP_CLK				4
>> +#define LPASS_QDSP6SS_CORE_CLK				5
>> +
>> +#endif
>> -- 
>> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
>> of the Code Aurora Forum, hosted by the  Linux Foundation.
>>
>>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
new file mode 100644
index 0000000..7b62763
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
@@ -0,0 +1,69 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm LPASS Core Clock Controller Binding for SC7280
+
+maintainers:
+  - Taniya Das <tdas@codeaurora.org>
+
+description: |
+  Qualcomm LPASS core clock control module which supports the clocks and
+  power domains on SC7280.
+
+  See also:
+  - dt-bindings/clock/qcom,lpass-sc7280.h
+
+properties:
+  compatible:
+    enum:
+      - qcom,sc7280-lpasscc
+
+  clocks:
+    items:
+      - description: gcc_cfg_noc_lpass_clk from GCC
+
+  clock-names:
+    items:
+      - const: iface
+
+  '#clock-cells':
+    const: 1
+
+  reg:
+    minItems: 3
+    items:
+      - description: LPASS qdsp6ss register
+      - description: LPASS top-cc register
+      - description: LPASS cc register
+
+  reg-names:
+    items:
+      - const: qdsp6ss
+      - const: top_cc
+      - const: cc
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+    #include <dt-bindings/clock/qcom,lpass-sc7280.h>
+    clock-controller@3000000 {
+      compatible = "qcom,sc7280-lpasscc";
+      reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>;
+      reg-names = "qdsp6ss", "top_cc", "cc";
+      clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
+      clock-names = "iface";
+      #clock-cells = <1>;
+    };
+...
diff --git a/include/dt-bindings/clock/qcom,lpass-sc7280.h b/include/dt-bindings/clock/qcom,lpass-sc7280.h
new file mode 100644
index 0000000..a259463
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,lpass-sc7280.h
@@ -0,0 +1,16 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
+#define _DT_BINDINGS_CLK_QCOM_LPASS_SC7280_H
+
+#define LPASS_Q6SS_AHBM_CLK				0
+#define LPASS_Q6SS_AHBS_CLK				1
+#define LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK			2
+#define LPASS_QDSP6SS_XO_CLK				3
+#define LPASS_QDSP6SS_SLEEP_CLK				4
+#define LPASS_QDSP6SS_CORE_CLK				5
+
+#endif