| Message ID | 20211008113839.v3.2.I187502fa747bc01a1c624ccf20d985fdffe9c320@changeid (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 0faf297c427372ad2a02dc28e6d1327825031882 |
| Headers | show |
| Series | [v3,1/2] arm64: dts: sc7180: Factor out ti-sn65dsi86 support | expand |
Quoting Philip Chen (2021-10-08 11:39:35) > Add a dts fragment file to support the sc7180 boards with the second > source edp bridge, Parade ps8640. > > Signed-off-by: Philip Chen <philipchen@chromium.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Hi, On Fri, Oct 8, 2021 at 11:39 AM Philip Chen <philipchen@chromium.org> wrote: > > Add a dts fragment file to support the sc7180 boards with the second > source edp bridge, Parade ps8640. > > Signed-off-by: Philip Chen <philipchen@chromium.org> > --- > > Changes in v3: > - Set gpio32 active high > - Rename edp-bridge to bridge to align with ti-sn65 dts > - Remove the unused label 'aux_bus' > > Changes in v2: > - Add the definition of edp_brij_i2c and some other properties to > ps8640 dts, making it match ti-sn65dsi86 dts better > > .../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++ > 1 file changed, 109 insertions(+) Reviewed-by: Douglas Anderson <dianders@chromium.org> I think these two are good to go as long as Bjorn doesn't mind having this dtsi file in the tree with no users yet. It looks nearly certain that some trogdor devices will ship with it. -Doug
Hi Bjorn, Could you please take a look at this patch series? On Fri, Oct 8, 2021 at 4:15 PM Doug Anderson <dianders@chromium.org> wrote: > > Hi, > > On Fri, Oct 8, 2021 at 11:39 AM Philip Chen <philipchen@chromium.org> wrote: > > > > Add a dts fragment file to support the sc7180 boards with the second > > source edp bridge, Parade ps8640. > > > > Signed-off-by: Philip Chen <philipchen@chromium.org> > > --- > > > > Changes in v3: > > - Set gpio32 active high > > - Rename edp-bridge to bridge to align with ti-sn65 dts > > - Remove the unused label 'aux_bus' > > > > Changes in v2: > > - Add the definition of edp_brij_i2c and some other properties to > > ps8640 dts, making it match ti-sn65dsi86 dts better > > > > .../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++ > > 1 file changed, 109 insertions(+) > > Reviewed-by: Douglas Anderson <dianders@chromium.org> > > I think these two are good to go as long as Bjorn doesn't mind having > this dtsi file in the tree with no users yet. It looks nearly certain > that some trogdor devices will ship with it. > > -Doug
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi new file mode 100644 index 000000000000..a3d69540d4e4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge + * + * Copyright 2021 Google LLC. + */ + +/ { + pp3300_brij_ps8640: pp3300-brij-ps8640 { + compatible = "regulator-fixed"; + status = "okay"; + regulator-name = "pp3300_brij_ps8640"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&en_pp3300_edp_brij_ps8640>; + + vin-supply = <&pp3300_a>; + }; +}; + +&dsi0_out { + remote-endpoint = <&ps8640_in>; +}; + +edp_brij_i2c: &i2c2 { + status = "okay"; + clock-frequency = <400000>; + + ps8640_bridge: bridge@8 { + compatible = "parade,ps8640"; + reg = <0x8>; + + powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>; + reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>; + + vdd12-supply = <&pp1200_brij>; + vdd33-supply = <&pp3300_brij_ps8640>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ps8640_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + ps8640_out: endpoint { + remote-endpoint = <&panel_in_edp>; + }; + }; + }; + + aux-bus { + panel: panel { + /* Compatible will be filled in per-board */ + power-supply = <&pp3300_dx_edp>; + backlight = <&backlight>; + + port { + panel_in_edp: endpoint { + remote-endpoint = <&ps8640_out>; + }; + }; + }; + }; + }; +}; + +&tlmm { + edp_brij_ps8640_rst: edp-brij-ps8640-rst { + pinmux { + pins = "gpio11"; + function = "gpio"; + }; + + pinconf { + pins = "gpio11"; + drive-strength = <2>; + bias-disable; + }; + }; + + en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 { + pinmux { + pins = "gpio32"; + function = "gpio"; + }; + + pinconf { + pins = "gpio32"; + drive-strength = <2>; + bias-disable; + }; + }; +};
Add a dts fragment file to support the sc7180 boards with the second source edp bridge, Parade ps8640. Signed-off-by: Philip Chen <philipchen@chromium.org> --- Changes in v3: - Set gpio32 active high - Rename edp-bridge to bridge to align with ti-sn65 dts - Remove the unused label 'aux_bus' Changes in v2: - Add the definition of edp_brij_i2c and some other properties to ps8640 dts, making it match ti-sn65dsi86 dts better .../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi