| Message ID | 20211011095534.1580406-1-vladimir.zapolskiy@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: dts: sdm845: Fix Qualcomm crypto engine bus clock | expand |
On 10/11/21 5:55 AM, Vladimir Zapolskiy wrote: > The change corrects the described bus clock of the QCE. > > Fixes: 3e482859f1ef ("dts: qcom: sdm845: Add dt entries to support crypto engine.") > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Thanks for the fix. Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index b051adfed4a9..79a87eeee090 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2376,7 +2376,7 @@ crypto: crypto@1dfa000 { > compatible = "qcom,crypto-v5.4"; > reg = <0 0x01dfa000 0 0x6000>; > clocks = <&gcc GCC_CE1_AHB_CLK>, > - <&gcc GCC_CE1_AHB_CLK>, > + <&gcc GCC_CE1_AXI_CLK>, > <&rpmhcc 15>; > clock-names = "iface", "bus", "core"; > dmas = <&cryptobam 6>, <&cryptobam 7>; >
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b051adfed4a9..79a87eeee090 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2376,7 +2376,7 @@ crypto: crypto@1dfa000 { compatible = "qcom,crypto-v5.4"; reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, - <&gcc GCC_CE1_AHB_CLK>, + <&gcc GCC_CE1_AXI_CLK>, <&rpmhcc 15>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 6>, <&cryptobam 7>;
The change corrects the described bus clock of the QCE. Fixes: 3e482859f1ef ("dts: qcom: sdm845: Add dt entries to support crypto engine.") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)