| Message ID | 20210928200804.50922-8-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk/mmc: renesas_sdhi: refactor SDnH to be a seperate clock | expand |
Hi Wolfram, arm64: dts: renesas: r8a77951: ... On Tue, Sep 28, 2021 at 10:08 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi > @@ -2668,7 +2668,8 @@ sdhi0: mmc@ee100000 { > "renesas,rcar-gen3-sdhi"; > reg = <0 0xee100000 0 0x2000>; > interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cpg CPG_MOD 314>; > + clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; > + clock-names = "core", "clkh"; > max-frequency = <200000000>; > power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; > resets = <&cpg 314>; > @@ -2681,7 +2682,8 @@ sdhi1: mmc@ee120000 { > "renesas,rcar-gen3-sdhi"; > reg = <0 0xee120000 0 0x2000>; > interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cpg CPG_MOD 313>; > + clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; > + clock-names = "core", "clkh"; > max-frequency = <200000000>; > power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; > resets = <&cpg 313>; > @@ -2694,7 +2696,8 @@ sdhi2: mmc@ee140000 { > "renesas,rcar-gen3-sdhi"; > reg = <0 0xee140000 0 0x2000>; > interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cpg CPG_MOD 312>; > + clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; > + clock-names = "core", "clkh"; > max-frequency = <200000000>; > power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; > resets = <&cpg 312>; > @@ -2707,7 +2710,8 @@ sdhi3: mmc@ee160000 { > "renesas,rcar-gen3-sdhi"; > reg = <0 0xee160000 0 0x2000>; > interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cpg CPG_MOD 311>; > + clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; > + clock-names = "core", "clkh"; > max-frequency = <200000000>; > power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; > resets = <&cpg 311>; LGTM, but fails dtbs_check, as expected: mmc@ee100000: clock-names:1: 'cd' was expected ... As that is a binding issue, and not an issue with this patch: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi index 1768a3e6bb8d..391ffe6ca03e 100644 --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi @@ -2668,7 +2668,8 @@ sdhi0: mmc@ee100000 { "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; + clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 314>; @@ -2681,7 +2682,8 @@ sdhi1: mmc@ee120000 { "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; + clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 313>; @@ -2694,7 +2696,8 @@ sdhi2: mmc@ee140000 { "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; + clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 312>; @@ -2707,7 +2710,8 @@ sdhi3: mmc@ee160000 { "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; + clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 311>;
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- arch/arm64/boot/dts/renesas/r8a77951.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)