Message ID | 20211013010120.96851-6-sjg@chromium.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | fdt: Make OF_BOARD a boolean option | expand |
Hi Simon The only place I could agree with this file presence is in the documentation directory, not in dts. It creates a mental picture for the reader an entirely bad mind scheme around Qemu and DT. And even in a documentation directory I would place a bug warning: don’t use this with any kernel , Qemu generates a DT dynamically based on cpu, memory and devices specified at the command line. I would also document how to get the DT that Qemu generates (and lkvm btw) outside any firmware/os provided. Cheers FF Le mer. 13 oct. 2021 à 03:03, Simon Glass <sjg@chromium.org> a écrit : > Add this file, generated from qemu, so there is a reference devicetree > in the U-Boot tree. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > arch/arm/dts/Makefile | 2 +- > arch/arm/dts/qemu-arm64.dts | 381 +++++++++++++++++++++++++++++++++++ > configs/qemu_arm64_defconfig | 1 + > 3 files changed, 383 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/qemu-arm64.dts > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index e2fc0cb65fc..52c586f3974 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1145,7 +1145,7 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += > imx8mm-cl-iot-gate.dtb > > dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb > > -dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb > +dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb > > targets += $(dtb-y) > > diff --git a/arch/arm/dts/qemu-arm64.dts b/arch/arm/dts/qemu-arm64.dts > new file mode 100644 > index 00000000000..7590e49cc84 > --- /dev/null > +++ b/arch/arm/dts/qemu-arm64.dts > @@ -0,0 +1,381 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +/* > + * Sample device tree for qemu_arm64 > + > + * Copyright 2021 Google LLC > + */ > + > +/dts-v1/; > + > +/ { > + interrupt-parent = <0x8001>; > + #size-cells = <0x02>; > + #address-cells = <0x02>; > + compatible = "linux,dummy-virt"; > + > + psci { > + migrate = <0xc4000005>; > + cpu_on = <0xc4000003>; > + cpu_off = <0x84000002>; > + cpu_suspend = <0xc4000001>; > + method = "hvc"; > + compatible = "arm,psci-0.2\0arm,psci"; > + }; > + > + memory@40000000 { > + reg = <0x00 0x40000000 0x00 0x8000000>; > + device_type = "memory"; > + }; > + > + platform@c000000 { > + interrupt-parent = <0x8001>; > + ranges = <0x00 0x00 0xc000000 0x2000000>; > + #address-cells = <0x01>; > + #size-cells = <0x01>; > + compatible = "qemu,platform\0simple-bus"; > + }; > + > + fw-cfg@9020000 { > + dma-coherent; > + reg = <0x00 0x9020000 0x00 0x18>; > + compatible = "qemu,fw-cfg-mmio"; > + }; > + > + virtio_mmio@a000000 { > + dma-coherent; > + interrupts = <0x00 0x10 0x01>; > + reg = <0x00 0xa000000 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000200 { > + dma-coherent; > + interrupts = <0x00 0x11 0x01>; > + reg = <0x00 0xa000200 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000400 { > + dma-coherent; > + interrupts = <0x00 0x12 0x01>; > + reg = <0x00 0xa000400 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000600 { > + dma-coherent; > + interrupts = <0x00 0x13 0x01>; > + reg = <0x00 0xa000600 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000800 { > + dma-coherent; > + interrupts = <0x00 0x14 0x01>; > + reg = <0x00 0xa000800 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000a00 { > + dma-coherent; > + interrupts = <0x00 0x15 0x01>; > + reg = <0x00 0xa000a00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000c00 { > + dma-coherent; > + interrupts = <0x00 0x16 0x01>; > + reg = <0x00 0xa000c00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a000e00 { > + dma-coherent; > + interrupts = <0x00 0x17 0x01>; > + reg = <0x00 0xa000e00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001000 { > + dma-coherent; > + interrupts = <0x00 0x18 0x01>; > + reg = <0x00 0xa001000 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001200 { > + dma-coherent; > + interrupts = <0x00 0x19 0x01>; > + reg = <0x00 0xa001200 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001400 { > + dma-coherent; > + interrupts = <0x00 0x1a 0x01>; > + reg = <0x00 0xa001400 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001600 { > + dma-coherent; > + interrupts = <0x00 0x1b 0x01>; > + reg = <0x00 0xa001600 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001800 { > + dma-coherent; > + interrupts = <0x00 0x1c 0x01>; > + reg = <0x00 0xa001800 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001a00 { > + dma-coherent; > + interrupts = <0x00 0x1d 0x01>; > + reg = <0x00 0xa001a00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001c00 { > + dma-coherent; > + interrupts = <0x00 0x1e 0x01>; > + reg = <0x00 0xa001c00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a001e00 { > + dma-coherent; > + interrupts = <0x00 0x1f 0x01>; > + reg = <0x00 0xa001e00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002000 { > + dma-coherent; > + interrupts = <0x00 0x20 0x01>; > + reg = <0x00 0xa002000 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002200 { > + dma-coherent; > + interrupts = <0x00 0x21 0x01>; > + reg = <0x00 0xa002200 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002400 { > + dma-coherent; > + interrupts = <0x00 0x22 0x01>; > + reg = <0x00 0xa002400 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002600 { > + dma-coherent; > + interrupts = <0x00 0x23 0x01>; > + reg = <0x00 0xa002600 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002800 { > + dma-coherent; > + interrupts = <0x00 0x24 0x01>; > + reg = <0x00 0xa002800 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002a00 { > + dma-coherent; > + interrupts = <0x00 0x25 0x01>; > + reg = <0x00 0xa002a00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002c00 { > + dma-coherent; > + interrupts = <0x00 0x26 0x01>; > + reg = <0x00 0xa002c00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a002e00 { > + dma-coherent; > + interrupts = <0x00 0x27 0x01>; > + reg = <0x00 0xa002e00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003000 { > + dma-coherent; > + interrupts = <0x00 0x28 0x01>; > + reg = <0x00 0xa003000 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003200 { > + dma-coherent; > + interrupts = <0x00 0x29 0x01>; > + reg = <0x00 0xa003200 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003400 { > + dma-coherent; > + interrupts = <0x00 0x2a 0x01>; > + reg = <0x00 0xa003400 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003600 { > + dma-coherent; > + interrupts = <0x00 0x2b 0x01>; > + reg = <0x00 0xa003600 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003800 { > + dma-coherent; > + interrupts = <0x00 0x2c 0x01>; > + reg = <0x00 0xa003800 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003a00 { > + dma-coherent; > + interrupts = <0x00 0x2d 0x01>; > + reg = <0x00 0xa003a00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003c00 { > + dma-coherent; > + interrupts = <0x00 0x2e 0x01>; > + reg = <0x00 0xa003c00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + virtio_mmio@a003e00 { > + dma-coherent; > + interrupts = <0x00 0x2f 0x01>; > + reg = <0x00 0xa003e00 0x00 0x200>; > + compatible = "virtio,mmio"; > + }; > + > + pcie@10000000 { > + interrupt-map-mask = <0x1800 0x00 0x00 0x07>; > + interrupt-map = <0x00 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 > + 0x03 0x04 0x00 0x00 0x00 0x02 0x8001 0x00 > + 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 > + 0x8001 0x00 0x00 0x00 0x05 0x04 0x00 0x00 > + 0x00 0x04 0x8001 0x00 0x00 0x00 0x06 0x04 > + 0x800 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 > + 0x04 0x04 0x800 0x00 0x00 0x02 0x8001 0x00 > + 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 > + 0x8001 0x00 0x00 0x00 0x06 0x04 0x800 0x00 > + 0x00 0x04 0x8001 0x00 0x00 0x00 0x03 0x04 > + 0x1000 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 > + 0x05 0x04 0x1000 0x00 0x00 0x02 0x8001 0x00 > + 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 > + 0x8001 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 > + 0x00 0x04 0x8001 0x00 0x00 0x00 0x04 0x04 > + 0x1800 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 > + 0x06 0x04 0x1800 0x00 0x00 0x02 0x8001 0x00 > + 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 > + 0x8001 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 > + 0x00 0x04 0x8001 0x00 0x00 0x00 0x05 0x04>; > + #interrupt-cells = <0x01>; > + ranges = <0x1000000 0x00 0x00 0x00 > + 0x3eff0000 0x00 0x10000 0x2000000 > + 0x00 0x10000000 0x00 0x10000000 > + 0x00 0x2eff0000 0x3000000 0x80 > + 0x00 0x80 0x00 0x80 > + 0x00>; > + reg = <0x40 0x10000000 0x00 0x10000000>; > + msi-parent = <0x8002>; > + dma-coherent; > + bus-range = <0x00 0xff>; > + linux,pci-domain = <0x00>; > + #size-cells = <0x02>; > + #address-cells = <0x03>; > + device_type = "pci"; > + compatible = "pci-host-ecam-generic"; > + }; > + > + pl031@9010000 { > + clock-names = "apb_pclk"; > + clocks = <0x8000>; > + interrupts = <0x00 0x02 0x04>; > + reg = <0x00 0x9010000 0x00 0x1000>; > + compatible = "arm,pl031\0arm,primecell"; > + }; > + > + pl011@9000000 { > + clock-names = "uartclk\0apb_pclk"; > + clocks = <0x8000 0x8000>; > + interrupts = <0x00 0x01 0x04>; > + reg = <0x00 0x9000000 0x00 0x1000>; > + compatible = "arm,pl011\0arm,primecell"; > + }; > + > + pmu { > + interrupts = <0x01 0x07 0x104>; > + compatible = "arm,armv8-pmuv3"; > + }; > + > + intc@8000000 { > + phandle = <0x8001>; > + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 > 0x10000>; > + compatible = "arm,cortex-a15-gic"; > + ranges; > + #size-cells = <0x02>; > + #address-cells = <0x02>; > + interrupt-controller; > + #interrupt-cells = <0x03>; > + > + v2m@8020000 { > + phandle = <0x8002>; > + reg = <0x00 0x8020000 0x00 0x1000>; > + msi-controller; > + compatible = "arm,gic-v2m-frame"; > + }; > + }; > + > + flash@0 { > + bank-width = <0x04>; > + reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 > 0x4000000>; > + compatible = "cfi-flash"; > + }; > + > + cpus { > + #size-cells = <0x00>; > + #address-cells = <0x01>; > + > + cpu@0 { > + reg = <0x00>; > + compatible = "arm,cortex-a57"; > + device_type = "cpu"; > + }; > + }; > + > + timer { > + interrupts = <0x01 0x0d 0x104 0x01 0x0e 0x104 0x01 0x0b > 0x104 0x01 0x0a 0x104>; > + always-on; > + compatible = "arm,armv8-timer\0arm,armv7-timer"; > + }; > + > + apb-pclk { > + phandle = <0x8000>; > + clock-output-names = "clk24mhz"; > + clock-frequency = <0x16e3600>; > + #clock-cells = <0x00>; > + compatible = "fixed-clock"; > + }; > + > + chosen { > + stdout-path = "/pl011@9000000"; > + }; > +}; > diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig > index cf5a03e8a2f..e51ce5c799f 100644 > --- a/configs/qemu_arm64_defconfig > +++ b/configs/qemu_arm64_defconfig > @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 > CONFIG_ENV_SIZE=0x40000 > CONFIG_ENV_SECT_SIZE=0x40000 > CONFIG_SYS_MALLOC_LEN=0x1000000 > +CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" > CONFIG_AHCI=y > CONFIG_DISTRO_DEFAULTS=y > CONFIG_SYS_LOAD_ADDR=0x40200000 > -- > 2.33.0.882.g93a45727a2-goog > > -- François-Frédéric Ozog | *Director Business Development* T: +33.67221.6485 francois.ozog@linaro.org | Skype: ffozog
François Ozog <francois.ozog@linaro.org> writes: > Hi Simon > > The only place I could agree with this file presence is in the documentation directory, not in dts. It creates a mental picture for the reader > an entirely bad mind scheme around Qemu and DT. > > And even in a documentation directory I would place a bug warning: don’t use this with any kernel , Qemu generates a DT dynamically > based on cpu, memory and devices specified at the command line. Certainly for the arm, aarch64 and riscv "virt" machines you should always use the QEMU generated DTB. I'm not entirely clear what a qemu_arm and qemu_arm64 def targets are meant to be in this context.
On Wed, Oct 27, 2021 at 03:44:08PM +0100, Alex Bennée wrote: > > François Ozog <francois.ozog@linaro.org> writes: > > > Hi Simon > > > > The only place I could agree with this file presence is in the documentation directory, not in dts. It creates a mental picture for the reader > > an entirely bad mind scheme around Qemu and DT. > > > > And even in a documentation directory I would place a bug warning: don’t use this with any kernel , Qemu generates a DT dynamically > > based on cpu, memory and devices specified at the command line. > > Certainly for the arm, aarch64 and riscv "virt" machines you should > always use the QEMU generated DTB. I'm not entirely clear what a > qemu_arm and qemu_arm64 def targets are meant to be in this context. Agreed. We cannot include random device trees in U-Boot for devices that generate their own at run time or otherwise have the source of truth elsewhere.
Hi all, On Wed, 27 Oct 2021 at 08:56, Tom Rini <trini@konsulko.com> wrote: > > On Wed, Oct 27, 2021 at 03:44:08PM +0100, Alex Bennée wrote: > > > > François Ozog <francois.ozog@linaro.org> writes: > > > > > Hi Simon > > > > > > The only place I could agree with this file presence is in the documentation directory, not in dts. It creates a mental picture for the reader > > > an entirely bad mind scheme around Qemu and DT. > > > > > > And even in a documentation directory I would place a bug warning: don’t use this with any kernel , Qemu generates a DT dynamically > > > based on cpu, memory and devices specified at the command line. > > > > Certainly for the arm, aarch64 and riscv "virt" machines you should > > always use the QEMU generated DTB. I'm not entirely clear what a > > qemu_arm and qemu_arm64 def targets are meant to be in this context. > > Agreed. We cannot include random device trees in U-Boot for devices > that generate their own at run time or otherwise have the source of > truth elsewhere. Until we have a way of bringing in the u-boot.dtsi that people in QEMU can agree on, I don't see an alternative. I will send a series for the bloblist handoff next week and I think you will all see what I mean. Perhaps all this will be easier a year or so, if we continue to make progress on the devicetree validation/sharing stuff, but for now, this seems like the only viable approach to me. Regards, Simon
On Wed, Oct 27, 2021 at 12:34:26PM -0600, Simon Glass wrote: > Hi all, > > On Wed, 27 Oct 2021 at 08:56, Tom Rini <trini@konsulko.com> wrote: > > > > On Wed, Oct 27, 2021 at 03:44:08PM +0100, Alex Bennée wrote: > > > > > > François Ozog <francois.ozog@linaro.org> writes: > > > > > > > Hi Simon > > > > > > > > The only place I could agree with this file presence is in the documentation directory, not in dts. It creates a mental picture for the reader > > > > an entirely bad mind scheme around Qemu and DT. > > > > > > > > And even in a documentation directory I would place a bug warning: don’t use this with any kernel , Qemu generates a DT dynamically > > > > based on cpu, memory and devices specified at the command line. > > > > > > Certainly for the arm, aarch64 and riscv "virt" machines you should > > > always use the QEMU generated DTB. I'm not entirely clear what a > > > qemu_arm and qemu_arm64 def targets are meant to be in this context. > > > > Agreed. We cannot include random device trees in U-Boot for devices > > that generate their own at run time or otherwise have the source of > > truth elsewhere. > > Until we have a way of bringing in the u-boot.dtsi that people in QEMU > can agree on, I don't see an alternative. I will send a series for the > bloblist handoff next week and I think you will all see what I mean. I think the alternative is that QEMU in U-Boot just can't be used for certain features. Which is annoying in that it would be good to use it to test certain feature, yes. It's generating a good and valid enough dtb for Linux, so it should be good enough for us in general.
There are QEMU targets that have fixed hardware which do rely on the firmware to have a fixed view of the hardware. sbsa-ref is one such board although there will be some versioning required for later levels. On Wed, 27 Oct 2021, 19:39 Tom Rini, <trini@konsulko.com> wrote: > On Wed, Oct 27, 2021 at 12:34:26PM -0600, Simon Glass wrote: > > Hi all, > > > > On Wed, 27 Oct 2021 at 08:56, Tom Rini <trini@konsulko.com> wrote: > > > > > > On Wed, Oct 27, 2021 at 03:44:08PM +0100, Alex Bennée wrote: > > > > > > > > François Ozog <francois.ozog@linaro.org> writes: > > > > > > > > > Hi Simon > > > > > > > > > > The only place I could agree with this file presence is in the > documentation directory, not in dts. It creates a mental picture for the > reader > > > > > an entirely bad mind scheme around Qemu and DT. > > > > > > > > > > And even in a documentation directory I would place a bug warning: > don’t use this with any kernel , Qemu generates a DT dynamically > > > > > based on cpu, memory and devices specified at the command line. > > > > > > > > Certainly for the arm, aarch64 and riscv "virt" machines you should > > > > always use the QEMU generated DTB. I'm not entirely clear what a > > > > qemu_arm and qemu_arm64 def targets are meant to be in this context. > > > > > > Agreed. We cannot include random device trees in U-Boot for devices > > > that generate their own at run time or otherwise have the source of > > > truth elsewhere. > > > > Until we have a way of bringing in the u-boot.dtsi that people in QEMU > > can agree on, I don't see an alternative. I will send a series for the > > bloblist handoff next week and I think you will all see what I mean. > > I think the alternative is that QEMU in U-Boot just can't be used for > certain features. Which is annoying in that it would be good to use it > to test certain feature, yes. It's generating a good and valid enough > dtb for Linux, so it should be good enough for us in general. > > -- > Tom >
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e2fc0cb65fc..52c586f3974 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1145,7 +1145,7 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb -dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb +dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb targets += $(dtb-y) diff --git a/arch/arm/dts/qemu-arm64.dts b/arch/arm/dts/qemu-arm64.dts new file mode 100644 index 00000000000..7590e49cc84 --- /dev/null +++ b/arch/arm/dts/qemu-arm64.dts @@ -0,0 +1,381 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Sample device tree for qemu_arm64 + + * Copyright 2021 Google LLC + */ + +/dts-v1/; + +/ { + interrupt-parent = <0x8001>; + #size-cells = <0x02>; + #address-cells = <0x02>; + compatible = "linux,dummy-virt"; + + psci { + migrate = <0xc4000005>; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + method = "hvc"; + compatible = "arm,psci-0.2\0arm,psci"; + }; + + memory@40000000 { + reg = <0x00 0x40000000 0x00 0x8000000>; + device_type = "memory"; + }; + + platform@c000000 { + interrupt-parent = <0x8001>; + ranges = <0x00 0x00 0xc000000 0x2000000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "qemu,platform\0simple-bus"; + }; + + fw-cfg@9020000 { + dma-coherent; + reg = <0x00 0x9020000 0x00 0x18>; + compatible = "qemu,fw-cfg-mmio"; + }; + + virtio_mmio@a000000 { + dma-coherent; + interrupts = <0x00 0x10 0x01>; + reg = <0x00 0xa000000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000200 { + dma-coherent; + interrupts = <0x00 0x11 0x01>; + reg = <0x00 0xa000200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000400 { + dma-coherent; + interrupts = <0x00 0x12 0x01>; + reg = <0x00 0xa000400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000600 { + dma-coherent; + interrupts = <0x00 0x13 0x01>; + reg = <0x00 0xa000600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000800 { + dma-coherent; + interrupts = <0x00 0x14 0x01>; + reg = <0x00 0xa000800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000a00 { + dma-coherent; + interrupts = <0x00 0x15 0x01>; + reg = <0x00 0xa000a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000c00 { + dma-coherent; + interrupts = <0x00 0x16 0x01>; + reg = <0x00 0xa000c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a000e00 { + dma-coherent; + interrupts = <0x00 0x17 0x01>; + reg = <0x00 0xa000e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001000 { + dma-coherent; + interrupts = <0x00 0x18 0x01>; + reg = <0x00 0xa001000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001200 { + dma-coherent; + interrupts = <0x00 0x19 0x01>; + reg = <0x00 0xa001200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001400 { + dma-coherent; + interrupts = <0x00 0x1a 0x01>; + reg = <0x00 0xa001400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001600 { + dma-coherent; + interrupts = <0x00 0x1b 0x01>; + reg = <0x00 0xa001600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001800 { + dma-coherent; + interrupts = <0x00 0x1c 0x01>; + reg = <0x00 0xa001800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001a00 { + dma-coherent; + interrupts = <0x00 0x1d 0x01>; + reg = <0x00 0xa001a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001c00 { + dma-coherent; + interrupts = <0x00 0x1e 0x01>; + reg = <0x00 0xa001c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a001e00 { + dma-coherent; + interrupts = <0x00 0x1f 0x01>; + reg = <0x00 0xa001e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002000 { + dma-coherent; + interrupts = <0x00 0x20 0x01>; + reg = <0x00 0xa002000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002200 { + dma-coherent; + interrupts = <0x00 0x21 0x01>; + reg = <0x00 0xa002200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002400 { + dma-coherent; + interrupts = <0x00 0x22 0x01>; + reg = <0x00 0xa002400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002600 { + dma-coherent; + interrupts = <0x00 0x23 0x01>; + reg = <0x00 0xa002600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002800 { + dma-coherent; + interrupts = <0x00 0x24 0x01>; + reg = <0x00 0xa002800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002a00 { + dma-coherent; + interrupts = <0x00 0x25 0x01>; + reg = <0x00 0xa002a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002c00 { + dma-coherent; + interrupts = <0x00 0x26 0x01>; + reg = <0x00 0xa002c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a002e00 { + dma-coherent; + interrupts = <0x00 0x27 0x01>; + reg = <0x00 0xa002e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003000 { + dma-coherent; + interrupts = <0x00 0x28 0x01>; + reg = <0x00 0xa003000 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003200 { + dma-coherent; + interrupts = <0x00 0x29 0x01>; + reg = <0x00 0xa003200 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003400 { + dma-coherent; + interrupts = <0x00 0x2a 0x01>; + reg = <0x00 0xa003400 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003600 { + dma-coherent; + interrupts = <0x00 0x2b 0x01>; + reg = <0x00 0xa003600 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003800 { + dma-coherent; + interrupts = <0x00 0x2c 0x01>; + reg = <0x00 0xa003800 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003a00 { + dma-coherent; + interrupts = <0x00 0x2d 0x01>; + reg = <0x00 0xa003a00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003c00 { + dma-coherent; + interrupts = <0x00 0x2e 0x01>; + reg = <0x00 0xa003c00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + virtio_mmio@a003e00 { + dma-coherent; + interrupts = <0x00 0x2f 0x01>; + reg = <0x00 0xa003e00 0x00 0x200>; + compatible = "virtio,mmio"; + }; + + pcie@10000000 { + interrupt-map-mask = <0x1800 0x00 0x00 0x07>; + interrupt-map = <0x00 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 + 0x03 0x04 0x00 0x00 0x00 0x02 0x8001 0x00 + 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 + 0x8001 0x00 0x00 0x00 0x05 0x04 0x00 0x00 + 0x00 0x04 0x8001 0x00 0x00 0x00 0x06 0x04 + 0x800 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 + 0x04 0x04 0x800 0x00 0x00 0x02 0x8001 0x00 + 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 + 0x8001 0x00 0x00 0x00 0x06 0x04 0x800 0x00 + 0x00 0x04 0x8001 0x00 0x00 0x00 0x03 0x04 + 0x1000 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 + 0x05 0x04 0x1000 0x00 0x00 0x02 0x8001 0x00 + 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 + 0x8001 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 + 0x00 0x04 0x8001 0x00 0x00 0x00 0x04 0x04 + 0x1800 0x00 0x00 0x01 0x8001 0x00 0x00 0x00 + 0x06 0x04 0x1800 0x00 0x00 0x02 0x8001 0x00 + 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 + 0x8001 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 + 0x00 0x04 0x8001 0x00 0x00 0x00 0x05 0x04>; + #interrupt-cells = <0x01>; + ranges = <0x1000000 0x00 0x00 0x00 + 0x3eff0000 0x00 0x10000 0x2000000 + 0x00 0x10000000 0x00 0x10000000 + 0x00 0x2eff0000 0x3000000 0x80 + 0x00 0x80 0x00 0x80 + 0x00>; + reg = <0x40 0x10000000 0x00 0x10000000>; + msi-parent = <0x8002>; + dma-coherent; + bus-range = <0x00 0xff>; + linux,pci-domain = <0x00>; + #size-cells = <0x02>; + #address-cells = <0x03>; + device_type = "pci"; + compatible = "pci-host-ecam-generic"; + }; + + pl031@9010000 { + clock-names = "apb_pclk"; + clocks = <0x8000>; + interrupts = <0x00 0x02 0x04>; + reg = <0x00 0x9010000 0x00 0x1000>; + compatible = "arm,pl031\0arm,primecell"; + }; + + pl011@9000000 { + clock-names = "uartclk\0apb_pclk"; + clocks = <0x8000 0x8000>; + interrupts = <0x00 0x01 0x04>; + reg = <0x00 0x9000000 0x00 0x1000>; + compatible = "arm,pl011\0arm,primecell"; + }; + + pmu { + interrupts = <0x01 0x07 0x104>; + compatible = "arm,armv8-pmuv3"; + }; + + intc@8000000 { + phandle = <0x8001>; + reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 0x10000>; + compatible = "arm,cortex-a15-gic"; + ranges; + #size-cells = <0x02>; + #address-cells = <0x02>; + interrupt-controller; + #interrupt-cells = <0x03>; + + v2m@8020000 { + phandle = <0x8002>; + reg = <0x00 0x8020000 0x00 0x1000>; + msi-controller; + compatible = "arm,gic-v2m-frame"; + }; + }; + + flash@0 { + bank-width = <0x04>; + reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>; + compatible = "cfi-flash"; + }; + + cpus { + #size-cells = <0x00>; + #address-cells = <0x01>; + + cpu@0 { + reg = <0x00>; + compatible = "arm,cortex-a57"; + device_type = "cpu"; + }; + }; + + timer { + interrupts = <0x01 0x0d 0x104 0x01 0x0e 0x104 0x01 0x0b 0x104 0x01 0x0a 0x104>; + always-on; + compatible = "arm,armv8-timer\0arm,armv7-timer"; + }; + + apb-pclk { + phandle = <0x8000>; + clock-output-names = "clk24mhz"; + clock-frequency = <0x16e3600>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + }; + + chosen { + stdout-path = "/pl011@9000000"; + }; +}; diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index cf5a03e8a2f..e51ce5c799f 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_MALLOC_LEN=0x1000000 +CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40200000
Add this file, generated from qemu, so there is a reference devicetree in the U-Boot tree. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/arm/dts/Makefile | 2 +- arch/arm/dts/qemu-arm64.dts | 381 +++++++++++++++++++++++++++++++++++ configs/qemu_arm64_defconfig | 1 + 3 files changed, 383 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/qemu-arm64.dts