| Message ID | 20211013204231.19287-12-matthew.brost@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Parallel submission aka multi-bb execbuf | expand |
On 10/13/2021 13:42, Matthew Brost wrote: > Parallel contexts are perma-pinned by the upper layers which makes the > backend implementation rather simple. The parent pins the guc_id and > children increment the parent's pin count on pin to ensure all the > contexts are unpinned before we disable scheduling with the GuC / or > deregister the context. > > v2: > (Daniel Vetter) > - Perma-pin parallel contexts > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> > --- > .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 70 +++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index c4d7a5c3b558..9fc40e3c1794 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -2585,6 +2585,76 @@ static const struct intel_context_ops virtual_guc_context_ops = { > .get_sibling = guc_virtual_get_sibling, > }; > > +/* Future patches will use this function */ > +__maybe_unused > +static int guc_parent_context_pin(struct intel_context *ce, void *vaddr) > +{ > + struct intel_engine_cs *engine = guc_virtual_get_sibling(ce->engine, 0); > + struct intel_guc *guc = ce_to_guc(ce); > + int ret; > + > + GEM_BUG_ON(!intel_context_is_parent(ce)); > + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); > + > + ret = pin_guc_id(guc, ce); > + if (unlikely(ret < 0)) > + return ret; > + > + return __guc_context_pin(ce, engine, vaddr); > +} > + > +/* Future patches will use this function */ > +__maybe_unused > +static int guc_child_context_pin(struct intel_context *ce, void *vaddr) > +{ > + struct intel_engine_cs *engine = guc_virtual_get_sibling(ce->engine, 0); > + > + GEM_BUG_ON(!intel_context_is_child(ce)); > + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); > + > + __intel_context_pin(ce->parallel.parent); > + return __guc_context_pin(ce, engine, vaddr); > +} > + > +/* Future patches will use this function */ > +__maybe_unused > +static void guc_parent_context_unpin(struct intel_context *ce) > +{ > + struct intel_guc *guc = ce_to_guc(ce); > + > + GEM_BUG_ON(context_enabled(ce)); > + GEM_BUG_ON(intel_context_is_barrier(ce)); > + GEM_BUG_ON(!intel_context_is_parent(ce)); > + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); > + > + unpin_guc_id(guc, ce); > + lrc_unpin(ce); > +} > + > +/* Future patches will use this function */ > +__maybe_unused > +static void guc_child_context_unpin(struct intel_context *ce) > +{ > + GEM_BUG_ON(context_enabled(ce)); > + GEM_BUG_ON(intel_context_is_barrier(ce)); > + GEM_BUG_ON(!intel_context_is_child(ce)); > + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); > + > + lrc_unpin(ce); > +} > + > +/* Future patches will use this function */ > +__maybe_unused > +static void guc_child_context_post_unpin(struct intel_context *ce) > +{ > + GEM_BUG_ON(!intel_context_is_child(ce)); > + GEM_BUG_ON(!intel_context_is_pinned(ce->parallel.parent)); > + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); > + > + lrc_post_unpin(ce); > + intel_context_unpin(ce->parallel.parent); > +} > + > static bool > guc_irq_enable_breadcrumbs(struct intel_breadcrumbs *b) > {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index c4d7a5c3b558..9fc40e3c1794 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -2585,6 +2585,76 @@ static const struct intel_context_ops virtual_guc_context_ops = { .get_sibling = guc_virtual_get_sibling, }; +/* Future patches will use this function */ +__maybe_unused +static int guc_parent_context_pin(struct intel_context *ce, void *vaddr) +{ + struct intel_engine_cs *engine = guc_virtual_get_sibling(ce->engine, 0); + struct intel_guc *guc = ce_to_guc(ce); + int ret; + + GEM_BUG_ON(!intel_context_is_parent(ce)); + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); + + ret = pin_guc_id(guc, ce); + if (unlikely(ret < 0)) + return ret; + + return __guc_context_pin(ce, engine, vaddr); +} + +/* Future patches will use this function */ +__maybe_unused +static int guc_child_context_pin(struct intel_context *ce, void *vaddr) +{ + struct intel_engine_cs *engine = guc_virtual_get_sibling(ce->engine, 0); + + GEM_BUG_ON(!intel_context_is_child(ce)); + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); + + __intel_context_pin(ce->parallel.parent); + return __guc_context_pin(ce, engine, vaddr); +} + +/* Future patches will use this function */ +__maybe_unused +static void guc_parent_context_unpin(struct intel_context *ce) +{ + struct intel_guc *guc = ce_to_guc(ce); + + GEM_BUG_ON(context_enabled(ce)); + GEM_BUG_ON(intel_context_is_barrier(ce)); + GEM_BUG_ON(!intel_context_is_parent(ce)); + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); + + unpin_guc_id(guc, ce); + lrc_unpin(ce); +} + +/* Future patches will use this function */ +__maybe_unused +static void guc_child_context_unpin(struct intel_context *ce) +{ + GEM_BUG_ON(context_enabled(ce)); + GEM_BUG_ON(intel_context_is_barrier(ce)); + GEM_BUG_ON(!intel_context_is_child(ce)); + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); + + lrc_unpin(ce); +} + +/* Future patches will use this function */ +__maybe_unused +static void guc_child_context_post_unpin(struct intel_context *ce) +{ + GEM_BUG_ON(!intel_context_is_child(ce)); + GEM_BUG_ON(!intel_context_is_pinned(ce->parallel.parent)); + GEM_BUG_ON(!intel_engine_is_virtual(ce->engine)); + + lrc_post_unpin(ce); + intel_context_unpin(ce->parallel.parent); +} + static bool guc_irq_enable_breadcrumbs(struct intel_breadcrumbs *b) {
Parallel contexts are perma-pinned by the upper layers which makes the backend implementation rather simple. The parent pins the guc_id and children increment the parent's pin count on pin to ensure all the contexts are unpinned before we disable scheduling with the GuC / or deregister the context. v2: (Daniel Vetter) - Perma-pin parallel contexts Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+)