diff mbox series

[06/33] target/ppc: Implement PLQ and PSTQ

Message ID 20211021194547.672988-7-matheus.ferst@eldorado.org.br (mailing list archive)
State New, archived
Headers show
Series PowerISA v3.1 instruction batch | expand

Commit Message

Matheus K. Ferst Oct. 21, 2021, 7:45 p.m. UTC 
From: Matheus Ferst <matheus.ferst@eldorado.org.br>

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
 target/ppc/insn64.decode                   |  4 ++++
 target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++
 2 files changed, 16 insertions(+)

Comments

Richard Henderson Oct. 22, 2021, 10:54 p.m. UTC | #1 
On 10/21/21 12:45 PM, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
> 
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
>   target/ppc/insn64.decode                   |  4 ++++
>   target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++
>   2 files changed, 16 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 11e5ea81d6..48756cd4ca 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -38,6 +38,8 @@  PLWA            000001 00 0--.-- .................. \
                 101001 ..... ..... ................     @PLS_D
 PLD             000001 00 0--.-- .................. \
                 111001 ..... ..... ................     @PLS_D
+PLQ             000001 00 0--.-- .................. \
+                111000 ..... ..... ................     @PLS_D
 
 ### Fixed-Point Store Instructions
 
@@ -50,6 +52,8 @@  PSTH            000001 10 0--.-- .................. \
 
 PSTD            000001 00 0--.-- .................. \
                 111101 ..... ..... ................     @PLS_D
+PSTQ            000001 00 0--.-- .................. \
+                111100 ..... ..... ................     @PLS_D
 
 ### Fixed-Point Arithmetic Instructions
 
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
index 61d129fb5d..0a6b3d61d1 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -162,6 +162,16 @@  static bool do_ldst_quad(DisasContext *ctx, arg_D *a, bool store, bool prefixed)
     return true;
 }
 
+static bool do_ldst_quad_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool store)
+{
+    arg_D d;
+    if (!resolve_PLS_D(ctx, &d, a)) {
+        return true;
+    }
+
+    return do_ldst_quad(ctx, &d, store, true);
+}
+
 /* Load Byte and Zero */
 TRANS(LBZ, do_ldst_D, false, false, MO_UB)
 TRANS(LBZX, do_ldst_X, false, false, MO_UB)
@@ -205,6 +215,7 @@  TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q)
 
 /* Load Quadword */
 TRANS64(LQ, do_ldst_quad, false, false);
+TRANS64(PLQ, do_ldst_quad_PLS_D, false);
 
 /* Store Byte */
 TRANS(STB, do_ldst_D, false, true, MO_UB)
@@ -236,6 +247,7 @@  TRANS64(PSTD, do_ldst_PLS_D, false, true, MO_Q)
 
 /* Store Quadword */
 TRANS64(STQ, do_ldst_quad, true, false);
+TRANS64(PSTQ, do_ldst_quad_PLS_D, true);
 
 /*
  * Fixed-Point Compare Instructions