diff mbox series

[26/33] target/ppc: added the instructions PLXVP and PSTXVP

Message ID 20211021194547.672988-27-matheus.ferst@eldorado.org.br (mailing list archive)
State New, archived
Headers show
Series PowerISA v3.1 instruction batch | expand

Commit Message

Matheus K. Ferst Oct. 21, 2021, 7:45 p.m. UTC
From: "Lucas Mateus Castro (alqotel)" <lucas.castro@eldorado.org.br>

Implemented the instructions plxvp and pstxvp using decodetree

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
 target/ppc/insn64.decode            | 9 +++++++++
 target/ppc/translate/vsx-impl.c.inc | 2 ++
 2 files changed, 11 insertions(+)

Comments

Richard Henderson Oct. 23, 2021, 8:57 p.m. UTC | #1
On 10/21/21 12:45 PM, matheus.ferst@eldorado.org.br wrote:
> From: "Lucas Mateus Castro (alqotel)"<lucas.castro@eldorado.org.br>
> 
> Implemented the instructions plxvp and pstxvp using decodetree
> 
> Signed-off-by: Lucas Mateus Castro (alqotel)<lucas.castro@eldorado.org.br>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
>   target/ppc/insn64.decode            | 9 +++++++++
>   target/ppc/translate/vsx-impl.c.inc | 2 ++
>   2 files changed, 11 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 093439b370..880ac3edc7 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -27,6 +27,11 @@ 
                 ..... rt:6 ra:5 ................         \
                 &PLS_D si=%pls_si
 
+%rt_tsxp        21:1 22:4 !function=times_2
+@8LS_D_TSXP     ...... .. . .. r:1 .. .................. \
+                ...... ..... ra:5 ................       \
+                &PLS_D si=%pls_si rt=%rt_tsxp
+
 ### Fixed-Point Load Instructions
 
 PLBZ            000001 10 0--.-- .................. \
@@ -147,3 +152,7 @@  PLXV            000001 00 0--.-- .................. \
                 11001 ...... ..... ................     @8LS_D_TSX
 PSTXV           000001 00 0--.-- .................. \
                 11011 ...... ..... ................     @8LS_D_TSX
+PLXVP           000001 00 0--.-- .................. \
+                111010 ..... ..... ................     @8LS_D_TSXP
+PSTXVP          000001 00 0--.-- .................. \
+                111110 ..... ..... ................     @8LS_D_TSXP
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
index 64c452ee24..4b40d2dbe0 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -2085,6 +2085,8 @@  TRANS(STXVPX, do_lstxv_X, true, true)
 TRANS(LXVPX, do_lstxv_X, false, true)
 TRANS64(PSTXV, do_lstxv_PLS_D, true, false)
 TRANS64(PLXV, do_lstxv_PLS_D, false, false)
+TRANS64(PSTXVP, do_lstxv_PLS_D, true, true)
+TRANS64(PLXVP, do_lstxv_PLS_D, false, true)
 
 #undef GEN_XX2FORM
 #undef GEN_XX3FORM