| Message ID | 20211029202424.175401-1-matheus.ferst@eldorado.org.br (mailing list archive) |
|---|---|
| Headers | show |
| Series | PowerISA v3.1 instruction batch | expand |
On Fri, Oct 29, 2021 at 05:23:50PM -0300, matheus.ferst@eldorado.org.br wrote: > From: Matheus Ferst <matheus.ferst@eldorado.org.br> > > This patch series implements 56 new instructions for POWER10, moving 28 > "old" instructions to decodetree along the way. The series is divided by > facility as follows: > > - From patch 1 to 4: Floating-Point > - From patch 5 to 10: Fixed-Point > - From patch 11 to 19: Vector > - From patch 20 to 34: Vector-Scalar Extensions > > Based-on: <20211029192417.400707-1-luis.pires@eldorado.org.br> > because of patch 2 ("target/ppc: Move REQUIRE_ALTIVEC/VECTOR to > translate.c") and patch 3 ("target/ppc: Introduce REQUIRE_FPU"), and > Based-on: ppc-for-6.2 > > Patches without review: 7-8, 12, 14-16, 19, 21-22, 24, 30 Patches 1..6 applied to ppc-for-6.2. > > v2: > - do_ea_calc now allocate and returns ea > - Inline version of cntlzdm/cnttzdm > - vecop_list removed from GVecGen* without fniv > - vsldbi/vsrdbi implemented with tcg_gen_extract2_i64 > - memcpy instead of misaligned load/stores on vector insert instructions > - Simplified helper for Vector Extract > - Fixed [p]stxv[xp]/[p]lxv[xp] to always access to lowest address first > in LE > - xxsplti32dx implemented with tcg_gen_st_i32 > - valid_values mask removed from lxvkq implementation > > Bruno Larsen (billionai) (6): > target/ppc: Introduce REQUIRE_VSX macro > target/ppc: moved XXSPLTW to using decodetree > target/ppc: moved XXSPLTIB to using decodetree > target/ppc: implemented XXSPLTI32DX > target/ppc: Implemented XXSPLTIW using decodetree > target/ppc: implemented XXSPLTIDP instruction > > Fernando Eckhardt Valle (4): > target/ppc: introduce do_ea_calc > target/ppc: move resolve_PLS_D to translate.c > target/ppc: Move load and store floating point instructions to > decodetree > target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions > > Lucas Mateus Castro (alqotel) (6): > target/ppc: moved stxv and lxv from legacy to decodtree > target/ppc: moved stxvx and lxvx from legacy to decodtree > target/ppc: added the instructions LXVP and STXVP > target/ppc: added the instructions LXVPX and STXVPX > target/ppc: added the instructions PLXV and PSTXV > target/ppc: added the instructions PLXVP and PSTXVP > > Luis Pires (2): > target/ppc: Implement cntlzdm > target/ppc: Implement cnttzdm > > Matheus Ferst (16): > target/ppc: Move LQ and STQ to decodetree > target/ppc: Implement PLQ and PSTQ > target/ppc: Implement pdepd instruction > target/ppc: Implement pextd instruction > target/ppc: Move vcfuged to vmx-impl.c.inc > target/ppc: Implement vclzdm/vctzdm instructions > target/ppc: Implement vpdepd/vpextd instruction > target/ppc: Implement vsldbi/vsrdbi instructions > target/ppc: Implement Vector Insert from GPR using GPR index insns > target/ppc: Implement Vector Insert Word from GPR using Immediate > insns > target/ppc: Implement Vector Insert from VSR using GPR index insns > target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree > target/ppc: Implement Vector Extract Double to VSR using GPR index > insns > target/ppc: receive high/low as argument in get/set_cpu_vsr > target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd > instructions > target/ppc: Implement lxvkq instruction > > target/ppc/helper.h | 20 +- > target/ppc/insn32.decode | 132 ++++ > target/ppc/insn64.decode | 72 +++ > target/ppc/int_helper.c | 134 +++- > target/ppc/translate.c | 215 ++----- > target/ppc/translate/fixedpoint-impl.c.inc | 218 ++++++- > target/ppc/translate/fp-impl.c.inc | 261 +++----- > target/ppc/translate/fp-ops.c.inc | 29 - > target/ppc/translate/vector-impl.c.inc | 48 -- > target/ppc/translate/vmx-impl.c.inc | 334 +++++++++- > target/ppc/translate/vmx-ops.c.inc | 10 +- > target/ppc/translate/vsx-impl.c.inc | 701 ++++++++++++--------- > target/ppc/translate/vsx-ops.c.inc | 4 - > 13 files changed, 1387 insertions(+), 791 deletions(-) > delete mode 100644 target/ppc/translate/vector-impl.c.inc >
On Mon, Nov 01, 2021 at 11:13:42AM +1100, David Gibson wrote: > On Fri, Oct 29, 2021 at 05:23:50PM -0300, matheus.ferst@eldorado.org.br wrote: > > From: Matheus Ferst <matheus.ferst@eldorado.org.br> > > > > This patch series implements 56 new instructions for POWER10, moving 28 > > "old" instructions to decodetree along the way. The series is divided by > > facility as follows: > > > > - From patch 1 to 4: Floating-Point > > - From patch 5 to 10: Fixed-Point > > - From patch 11 to 19: Vector > > - From patch 20 to 34: Vector-Scalar Extensions > > > > Based-on: <20211029192417.400707-1-luis.pires@eldorado.org.br> > > because of patch 2 ("target/ppc: Move REQUIRE_ALTIVEC/VECTOR to > > translate.c") and patch 3 ("target/ppc: Introduce REQUIRE_FPU"), and > > Based-on: ppc-for-6.2 > > > > Patches without review: 7-8, 12, 14-16, 19, 21-22, 24, 30 > > Patches 1..6 applied to ppc-for-6.2. Patches 7..10 now applied as well. 11 doesn't apply clean for me now, so if you can fix that up, fold in Richard's further reviews and repost, please. > > > > > v2: > > - do_ea_calc now allocate and returns ea > > - Inline version of cntlzdm/cnttzdm > > - vecop_list removed from GVecGen* without fniv > > - vsldbi/vsrdbi implemented with tcg_gen_extract2_i64 > > - memcpy instead of misaligned load/stores on vector insert instructions > > - Simplified helper for Vector Extract > > - Fixed [p]stxv[xp]/[p]lxv[xp] to always access to lowest address first > > in LE > > - xxsplti32dx implemented with tcg_gen_st_i32 > > - valid_values mask removed from lxvkq implementation > > > > Bruno Larsen (billionai) (6): > > target/ppc: Introduce REQUIRE_VSX macro > > target/ppc: moved XXSPLTW to using decodetree > > target/ppc: moved XXSPLTIB to using decodetree > > target/ppc: implemented XXSPLTI32DX > > target/ppc: Implemented XXSPLTIW using decodetree > > target/ppc: implemented XXSPLTIDP instruction > > > > Fernando Eckhardt Valle (4): > > target/ppc: introduce do_ea_calc > > target/ppc: move resolve_PLS_D to translate.c > > target/ppc: Move load and store floating point instructions to > > decodetree > > target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions > > > > Lucas Mateus Castro (alqotel) (6): > > target/ppc: moved stxv and lxv from legacy to decodtree > > target/ppc: moved stxvx and lxvx from legacy to decodtree > > target/ppc: added the instructions LXVP and STXVP > > target/ppc: added the instructions LXVPX and STXVPX > > target/ppc: added the instructions PLXV and PSTXV > > target/ppc: added the instructions PLXVP and PSTXVP > > > > Luis Pires (2): > > target/ppc: Implement cntlzdm > > target/ppc: Implement cnttzdm > > > > Matheus Ferst (16): > > target/ppc: Move LQ and STQ to decodetree > > target/ppc: Implement PLQ and PSTQ > > target/ppc: Implement pdepd instruction > > target/ppc: Implement pextd instruction > > target/ppc: Move vcfuged to vmx-impl.c.inc > > target/ppc: Implement vclzdm/vctzdm instructions > > target/ppc: Implement vpdepd/vpextd instruction > > target/ppc: Implement vsldbi/vsrdbi instructions > > target/ppc: Implement Vector Insert from GPR using GPR index insns > > target/ppc: Implement Vector Insert Word from GPR using Immediate > > insns > > target/ppc: Implement Vector Insert from VSR using GPR index insns > > target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree > > target/ppc: Implement Vector Extract Double to VSR using GPR index > > insns > > target/ppc: receive high/low as argument in get/set_cpu_vsr > > target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd > > instructions > > target/ppc: Implement lxvkq instruction > > > > target/ppc/helper.h | 20 +- > > target/ppc/insn32.decode | 132 ++++ > > target/ppc/insn64.decode | 72 +++ > > target/ppc/int_helper.c | 134 +++- > > target/ppc/translate.c | 215 ++----- > > target/ppc/translate/fixedpoint-impl.c.inc | 218 ++++++- > > target/ppc/translate/fp-impl.c.inc | 261 +++----- > > target/ppc/translate/fp-ops.c.inc | 29 - > > target/ppc/translate/vector-impl.c.inc | 48 -- > > target/ppc/translate/vmx-impl.c.inc | 334 +++++++++- > > target/ppc/translate/vmx-ops.c.inc | 10 +- > > target/ppc/translate/vsx-impl.c.inc | 701 ++++++++++++--------- > > target/ppc/translate/vsx-ops.c.inc | 4 - > > 13 files changed, 1387 insertions(+), 791 deletions(-) > > delete mode 100644 target/ppc/translate/vector-impl.c.inc > > >
From: Matheus Ferst <matheus.ferst@eldorado.org.br> This patch series implements 56 new instructions for POWER10, moving 28 "old" instructions to decodetree along the way. The series is divided by facility as follows: - From patch 1 to 4: Floating-Point - From patch 5 to 10: Fixed-Point - From patch 11 to 19: Vector - From patch 20 to 34: Vector-Scalar Extensions Based-on: <20211029192417.400707-1-luis.pires@eldorado.org.br> because of patch 2 ("target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c") and patch 3 ("target/ppc: Introduce REQUIRE_FPU"), and Based-on: ppc-for-6.2 Patches without review: 7-8, 12, 14-16, 19, 21-22, 24, 30 v2: - do_ea_calc now allocate and returns ea - Inline version of cntlzdm/cnttzdm - vecop_list removed from GVecGen* without fniv - vsldbi/vsrdbi implemented with tcg_gen_extract2_i64 - memcpy instead of misaligned load/stores on vector insert instructions - Simplified helper for Vector Extract - Fixed [p]stxv[xp]/[p]lxv[xp] to always access to lowest address first in LE - xxsplti32dx implemented with tcg_gen_st_i32 - valid_values mask removed from lxvkq implementation Bruno Larsen (billionai) (6): target/ppc: Introduce REQUIRE_VSX macro target/ppc: moved XXSPLTW to using decodetree target/ppc: moved XXSPLTIB to using decodetree target/ppc: implemented XXSPLTI32DX target/ppc: Implemented XXSPLTIW using decodetree target/ppc: implemented XXSPLTIDP instruction Fernando Eckhardt Valle (4): target/ppc: introduce do_ea_calc target/ppc: move resolve_PLS_D to translate.c target/ppc: Move load and store floating point instructions to decodetree target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions Lucas Mateus Castro (alqotel) (6): target/ppc: moved stxv and lxv from legacy to decodtree target/ppc: moved stxvx and lxvx from legacy to decodtree target/ppc: added the instructions LXVP and STXVP target/ppc: added the instructions LXVPX and STXVPX target/ppc: added the instructions PLXV and PSTXV target/ppc: added the instructions PLXVP and PSTXVP Luis Pires (2): target/ppc: Implement cntlzdm target/ppc: Implement cnttzdm Matheus Ferst (16): target/ppc: Move LQ and STQ to decodetree target/ppc: Implement PLQ and PSTQ target/ppc: Implement pdepd instruction target/ppc: Implement pextd instruction target/ppc: Move vcfuged to vmx-impl.c.inc target/ppc: Implement vclzdm/vctzdm instructions target/ppc: Implement vpdepd/vpextd instruction target/ppc: Implement vsldbi/vsrdbi instructions target/ppc: Implement Vector Insert from GPR using GPR index insns target/ppc: Implement Vector Insert Word from GPR using Immediate insns target/ppc: Implement Vector Insert from VSR using GPR index insns target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree target/ppc: Implement Vector Extract Double to VSR using GPR index insns target/ppc: receive high/low as argument in get/set_cpu_vsr target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions target/ppc: Implement lxvkq instruction target/ppc/helper.h | 20 +- target/ppc/insn32.decode | 132 ++++ target/ppc/insn64.decode | 72 +++ target/ppc/int_helper.c | 134 +++- target/ppc/translate.c | 215 ++----- target/ppc/translate/fixedpoint-impl.c.inc | 218 ++++++- target/ppc/translate/fp-impl.c.inc | 261 +++----- target/ppc/translate/fp-ops.c.inc | 29 - target/ppc/translate/vector-impl.c.inc | 48 -- target/ppc/translate/vmx-impl.c.inc | 334 +++++++++- target/ppc/translate/vmx-ops.c.inc | 10 +- target/ppc/translate/vsx-impl.c.inc | 701 ++++++++++++--------- target/ppc/translate/vsx-ops.c.inc | 4 - 13 files changed, 1387 insertions(+), 791 deletions(-) delete mode 100644 target/ppc/translate/vector-impl.c.inc