| Message ID | 20211110055303.136782-1-ran.jianping@zte.com.cn (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/amdgpu: remove unneeded variable | expand |
Applied. Thanks! Alex On Wed, Nov 10, 2021 at 12:53 AM <cgel.zte@gmail.com> wrote: > > From: ran jianping <ran.jianping@zte.com.cn> > > Fix the following coccicheck review: > ./drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c:1174:14-18 > :Unneeded variable > > Remove unneeded variable used to store return value. > > Reported-by: Zeal Robot <zealci@zte.com.cn> > Signed-off-by: ran jianping <ran.jianping@zte.com.cn> > --- > drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > index a4108025fe29..b0bb389185d5 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c > @@ -1171,7 +1171,7 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, > enum smu_clk_type clk_type, uint32_t mask) > { > struct amdgpu_device *adev = smu->adev; > - int ret = 0, size = 0; > + int ret = 0; > uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; > > soft_min_level = mask ? (ffs(mask) - 1) : 0; > @@ -1216,7 +1216,7 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, > if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) > amdgpu_gfx_off_ctrl(adev, true); > > - return size; > + return 0; > } > > static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu) > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c index a4108025fe29..b0bb389185d5 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -1171,7 +1171,7 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) { struct amdgpu_device *adev = smu->adev; - int ret = 0, size = 0; + int ret = 0; uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; soft_min_level = mask ? (ffs(mask) - 1) : 0; @@ -1216,7 +1216,7 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) amdgpu_gfx_off_ctrl(adev, true); - return size; + return 0; } static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu)