| Message ID | 20211110192417.4177741-1-fparent@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] arm64: dts: mt8183: add dpi node to mt8183 | expand |
On 10/11/2021 20:24, Fabien Parent wrote: > From: Pi-Hsun Shih <pihsun@chromium.org> > > Add dpi node to mt8183. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> > Signed-off-by: Fabien Parent <fparent@baylibre.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index ba4584faca5a..7c283c0b68b5 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -1443,6 +1443,17 @@ dsi0: dsi@14014000 { > phy-names = "dphy"; > }; > > + dpi0: dpi@14015000 { > + compatible = "mediatek,mt8183-dpi"; > + reg = <0 0x14015000 0 0x1000>; > + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>; > + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DPI_IF>, > + <&mmsys CLK_MM_DPI_MM>, > + <&apmixedsys CLK_APMIXED_TVDPLL>; > + clock-names = "pixel", "engine", "pll"; We are missing the output port node, don't we? Regards, Matthias > + }; > + > mutex: mutex@14016000 { > compatible = "mediatek,mt8183-disp-mutex"; > reg = <0 0x14016000 0 0x1000>; >
Hi Matthias, On Wed, Nov 17, 2021 at 6:33 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: > > > > On 10/11/2021 20:24, Fabien Parent wrote: > > From: Pi-Hsun Shih <pihsun@chromium.org> > > > > Add dpi node to mt8183. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index ba4584faca5a..7c283c0b68b5 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -1443,6 +1443,17 @@ dsi0: dsi@14014000 { > > phy-names = "dphy"; > > }; > > > > + dpi0: dpi@14015000 { > > + compatible = "mediatek,mt8183-dpi"; > > + reg = <0 0x14015000 0 0x1000>; > > + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>; > > + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > > + clocks = <&mmsys CLK_MM_DPI_IF>, > > + <&mmsys CLK_MM_DPI_MM>, > > + <&apmixedsys CLK_APMIXED_TVDPLL>; > > + clock-names = "pixel", "engine", "pll"; > > > We are missing the output port node, don't we? The output port node is defined in: [PATCH 2/3] arm64: dts: mediatek: mt8183-pumpkin: add HDMI support Unlike MT8173, there is no HDMI IP in the MT8183 SoC. > > Regards, > Matthias > > > + }; > > + > > mutex: mutex@14016000 { > > compatible = "mediatek,mt8183-disp-mutex"; > > reg = <0 0x14016000 0 0x1000>; > >
On 17/11/2021 19:21, Fabien Parent wrote: > Hi Matthias, > > > On Wed, Nov 17, 2021 at 6:33 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: >> >> >> >> On 10/11/2021 20:24, Fabien Parent wrote: >>> From: Pi-Hsun Shih <pihsun@chromium.org> >>> >>> Add dpi node to mt8183. >>> >>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> >>> Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> >>> Signed-off-by: Fabien Parent <fparent@baylibre.com> >>> --- >>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++++++++++ >>> 1 file changed, 11 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi >>> index ba4584faca5a..7c283c0b68b5 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi >>> @@ -1443,6 +1443,17 @@ dsi0: dsi@14014000 { >>> phy-names = "dphy"; >>> }; >>> >>> + dpi0: dpi@14015000 { >>> + compatible = "mediatek,mt8183-dpi"; >>> + reg = <0 0x14015000 0 0x1000>; >>> + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>; >>> + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; >>> + clocks = <&mmsys CLK_MM_DPI_IF>, >>> + <&mmsys CLK_MM_DPI_MM>, >>> + <&apmixedsys CLK_APMIXED_TVDPLL>; >>> + clock-names = "pixel", "engine", "pll"; >> >> >> We are missing the output port node, don't we? > > The output port node is defined in: [PATCH 2/3] arm64: dts: mediatek: > mt8183-pumpkin: add HDMI support > Unlike MT8173, there is no HDMI IP in the MT8183 SoC. > Ok, I missed that because the thread is broken. Would you mind to just resend the whole series? Thanks, Matthias >> >> Regards, >> Matthias >> >>> + }; >>> + >>> mutex: mutex@14016000 { >>> compatible = "mediatek,mt8183-disp-mutex"; >>> reg = <0 0x14016000 0 0x1000>; >>>
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index ba4584faca5a..7c283c0b68b5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1443,6 +1443,17 @@ dsi0: dsi@14014000 { phy-names = "dphy"; }; + dpi0: dpi@14015000 { + compatible = "mediatek,mt8183-dpi"; + reg = <0 0x14015000 0 0x1000>; + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DPI_IF>, + <&mmsys CLK_MM_DPI_MM>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + }; + mutex: mutex@14016000 { compatible = "mediatek,mt8183-disp-mutex"; reg = <0 0x14016000 0 0x1000>;