diff mbox series

[v2,9/9] powerpc: Simplify and move arch_randomize_brk()

Message ID 4c5a2b18774552c2226573f7069ffeee71ad77cb.1637828367.git.christophe.leroy@csgroup.eu (mailing list archive)
State New
Headers show
Series Convert powerpc to default topdown mmap layout | expand

Commit Message

Christophe Leroy Nov. 25, 2021, 8:23 a.m. UTC 
arch_randomize_brk() is only needed for hash on book3s/64, for other
platforms the one provided by the default mmap layout is good enough.

Move it to hash_utils.c and use randomize_page() like the generic one.

And properly opt out the radix case instead of making an assumption
on mmu_highuser_ssize.

Also change to a 32M range like most other architectures instead of 8M.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v2: New
---
 arch/powerpc/kernel/process.c         | 40 ---------------------------
 arch/powerpc/mm/book3s64/hash_utils.c | 18 ++++++++++++
 include/linux/sizes.h                 |  2 ++
 3 files changed, 20 insertions(+), 40 deletions(-)

Comments

Christophe Leroy Nov. 25, 2021, 10:42 a.m. UTC | #1 
Le 25/11/2021 à 09:23, Christophe Leroy a écrit :
> arch_randomize_brk() is only needed for hash on book3s/64, for other
> platforms the one provided by the default mmap layout is good enough.
> 
> Move it to hash_utils.c and use randomize_page() like the generic one.
> 
> And properly opt out the radix case instead of making an assumption
> on mmu_highuser_ssize.
> 
> Also change to a 32M range like most other architectures instead of 8M.
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> v2: New
> ---
>   arch/powerpc/kernel/process.c         | 40 ---------------------------
>   arch/powerpc/mm/book3s64/hash_utils.c | 18 ++++++++++++
>   include/linux/sizes.h                 |  2 ++
>   3 files changed, 20 insertions(+), 40 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index 406d7ee9e322..f1f2f17543d6 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -2274,43 +2274,3 @@ unsigned long arch_align_stack(unsigned long sp)
>   		sp -= get_random_int() & ~PAGE_MASK;
>   	return sp & ~0xf;
>   }
> -
> -static inline unsigned long brk_rnd(void)
> -{
> -        unsigned long rnd = 0;
> -
> -	/* 8MB for 32bit, 1GB for 64bit */
> -	if (is_32bit_task())
> -		rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT)));
> -	else
> -		rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT)));
> -
> -	return rnd << PAGE_SHIFT;
> -}
> -
> -unsigned long arch_randomize_brk(struct mm_struct *mm)
> -{
> -	unsigned long base = mm->brk;
> -	unsigned long ret;
> -
> -#ifdef CONFIG_PPC_BOOK3S_64
> -	/*
> -	 * If we are using 1TB segments and we are allowed to randomise
> -	 * the heap, we can put it above 1TB so it is backed by a 1TB
> -	 * segment. Otherwise the heap will be in the bottom 1TB
> -	 * which always uses 256MB segments and this may result in a
> -	 * performance penalty. We don't need to worry about radix. For
> -	 * radix, mmu_highuser_ssize remains unchanged from 256MB.
> -	 */
> -	if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
> -		base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
> -#endif
> -
> -	ret = PAGE_ALIGN(base + brk_rnd());
> -
> -	if (ret < mm->brk)
> -		return mm->brk;
> -
> -	return ret;
> -}
> -
> diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
> index 1d09d4aeddbf..3521fad6a479 100644
> --- a/arch/powerpc/mm/book3s64/hash_utils.c
> +++ b/arch/powerpc/mm/book3s64/hash_utils.c
> @@ -37,6 +37,7 @@
>   #include <linux/cpu.h>
>   #include <linux/pgtable.h>
>   #include <linux/debugfs.h>
> +#include <linux/random.h>

Also need <linux/elf-randomize.h> to get the declaration of 
arch_randomize_brk() and make sparse happy :)

Michael can you add it if you apply this version ?

Thanks

>   
>   #include <asm/interrupt.h>
>   #include <asm/processor.h>
> @@ -2072,3 +2073,20 @@ void __init print_system_hash_info(void)
>   	if (htab_hash_mask)
>   		pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
>   }
> +
> +unsigned long arch_randomize_brk(struct mm_struct *mm)
> +{
> +	/*
> +	 * If we are using 1TB segments and we are allowed to randomise
> +	 * the heap, we can put it above 1TB so it is backed by a 1TB
> +	 * segment. Otherwise the heap will be in the bottom 1TB
> +	 * which always uses 256MB segments and this may result in a
> +	 * performance penalty.
> +	 */
> +	if (is_32bit_task())
> +		return randomize_page(mm->brk, SZ_32M);
> +	else if (!radix_enabled() && mmu_highuser_ssize == MMU_SEGSIZE_1T)
> +		return randomize_page(max_t(unsigned long, mm->brk, SZ_1T), SZ_1G);
> +	else
> +		return randomize_page(mm->brk, SZ_1G);
> +}
> diff --git a/include/linux/sizes.h b/include/linux/sizes.h
> index 1ac79bcee2bb..84aa448d8bb3 100644
> --- a/include/linux/sizes.h
> +++ b/include/linux/sizes.h
> @@ -47,6 +47,8 @@
>   #define SZ_8G				_AC(0x200000000, ULL)
>   #define SZ_16G				_AC(0x400000000, ULL)
>   #define SZ_32G				_AC(0x800000000, ULL)
> +
> +#define SZ_1T				_AC(0x10000000000, ULL)
>   #define SZ_64T				_AC(0x400000000000, ULL)
>   
>   #endif /* __LINUX_SIZES_H__ */
>
kernel test robot Nov. 26, 2021, 12:36 a.m. UTC | #2 
Hi Christophe,

I love your patch! Perhaps something to improve:

[auto build test WARNING on powerpc/next]
[also build test WARNING on hnaz-mm/master linus/master v5.16-rc2 next-20211125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Christophe-Leroy/Convert-powerpc-to-default-topdown-mmap-layout/20211125-162916
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: riscv-allyesconfig (https://download.01.org/0day-ci/archive/20211126/202111260844.kcgKX5Uk-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/554c475dfb73dc352708dff3589b55845b3dd751
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Christophe-Leroy/Convert-powerpc-to-default-topdown-mmap-layout/20211125-162916
        git checkout 554c475dfb73dc352708dff3589b55845b3dd751
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/net/wireless/mediatek/mt76/mt7915/ drivers/pci/controller/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pci/controller/pci-xgene.c:52: warning: "SZ_1T" redefined
      52 | #define SZ_1T                           (SZ_1G*1024ULL)
         | 
   In file included from arch/riscv/include/asm/pgtable.h:10,
                    from include/linux/pgtable.h:6,
                    from arch/riscv/include/asm/io.h:15,
                    from include/linux/io.h:13,
                    from drivers/pci/controller/pci-xgene.c:11:
   include/linux/sizes.h:51: note: this is the location of the previous definition
      51 | #define SZ_1T                           _AC(0x10000000000, ULL)
         | 


vim +/SZ_1T +52 drivers/pci/controller/pci-xgene.c

5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  45  
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  46  #define LINK_UP_MASK			0x00000100
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  47  #define AXI_EP_CFG_ACCESS		0x10000
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  48  #define EN_COHERENCY			0xF0000000
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  49  #define EN_REG				0x00000001
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  50  #define OB_LO_IO			0x00000002
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  51  #define XGENE_PCIE_DEVICEID		0xE004
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01 @52  #define SZ_1T				(SZ_1G*1024ULL)
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  53  #define PIPE_PHY_RATE_RD(src)		((0xc000 & (u32)(src)) >> 0xe)
5f6b6ccdbe1cdfa drivers/pci/host/pci-xgene.c Tanmay Inamdar 2014-10-01  54  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
kernel test robot Nov. 26, 2021, 7:23 p.m. UTC | #3 
Hi Christophe,

I love your patch! Perhaps something to improve:

[auto build test WARNING on powerpc/next]
[also build test WARNING on hnaz-mm/master linus/master v5.16-rc2 next-20211126]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Christophe-Leroy/Convert-powerpc-to-default-topdown-mmap-layout/20211125-162916
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc64-buildonly-randconfig-r006-20211125 (https://download.01.org/0day-ci/archive/20211127/202111270342.b1Y85fuz-lkp@intel.com/config)
compiler: powerpc64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/554c475dfb73dc352708dff3589b55845b3dd751
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Christophe-Leroy/Convert-powerpc-to-default-topdown-mmap-layout/20211125-162916
        git checkout 554c475dfb73dc352708dff3589b55845b3dd751
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=powerpc SHELL=/bin/bash arch/powerpc/mm/book3s64/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> arch/powerpc/mm/book3s64/hash_utils.c:2077:15: warning: no previous prototype for 'arch_randomize_brk' [-Wmissing-prototypes]
    2077 | unsigned long arch_randomize_brk(struct mm_struct *mm)
         |               ^~~~~~~~~~~~~~~~~~


vim +/arch_randomize_brk +2077 arch/powerpc/mm/book3s64/hash_utils.c

  2076	
> 2077	unsigned long arch_randomize_brk(struct mm_struct *mm)

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff mbox series

Patch

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 406d7ee9e322..f1f2f17543d6 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -2274,43 +2274,3 @@  unsigned long arch_align_stack(unsigned long sp)
 		sp -= get_random_int() & ~PAGE_MASK;
 	return sp & ~0xf;
 }
-
-static inline unsigned long brk_rnd(void)
-{
-        unsigned long rnd = 0;
-
-	/* 8MB for 32bit, 1GB for 64bit */
-	if (is_32bit_task())
-		rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT)));
-	else
-		rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT)));
-
-	return rnd << PAGE_SHIFT;
-}
-
-unsigned long arch_randomize_brk(struct mm_struct *mm)
-{
-	unsigned long base = mm->brk;
-	unsigned long ret;
-
-#ifdef CONFIG_PPC_BOOK3S_64
-	/*
-	 * If we are using 1TB segments and we are allowed to randomise
-	 * the heap, we can put it above 1TB so it is backed by a 1TB
-	 * segment. Otherwise the heap will be in the bottom 1TB
-	 * which always uses 256MB segments and this may result in a
-	 * performance penalty. We don't need to worry about radix. For
-	 * radix, mmu_highuser_ssize remains unchanged from 256MB.
-	 */
-	if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
-		base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
-#endif
-
-	ret = PAGE_ALIGN(base + brk_rnd());
-
-	if (ret < mm->brk)
-		return mm->brk;
-
-	return ret;
-}
-
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
index 1d09d4aeddbf..3521fad6a479 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -37,6 +37,7 @@ 
 #include <linux/cpu.h>
 #include <linux/pgtable.h>
 #include <linux/debugfs.h>
+#include <linux/random.h>
 
 #include <asm/interrupt.h>
 #include <asm/processor.h>
@@ -2072,3 +2073,20 @@  void __init print_system_hash_info(void)
 	if (htab_hash_mask)
 		pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
 }
+
+unsigned long arch_randomize_brk(struct mm_struct *mm)
+{
+	/*
+	 * If we are using 1TB segments and we are allowed to randomise
+	 * the heap, we can put it above 1TB so it is backed by a 1TB
+	 * segment. Otherwise the heap will be in the bottom 1TB
+	 * which always uses 256MB segments and this may result in a
+	 * performance penalty.
+	 */
+	if (is_32bit_task())
+		return randomize_page(mm->brk, SZ_32M);
+	else if (!radix_enabled() && mmu_highuser_ssize == MMU_SEGSIZE_1T)
+		return randomize_page(max_t(unsigned long, mm->brk, SZ_1T), SZ_1G);
+	else
+		return randomize_page(mm->brk, SZ_1G);
+}
diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index 1ac79bcee2bb..84aa448d8bb3 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -47,6 +47,8 @@ 
 #define SZ_8G				_AC(0x200000000, ULL)
 #define SZ_16G				_AC(0x400000000, ULL)
 #define SZ_32G				_AC(0x800000000, ULL)
+
+#define SZ_1T				_AC(0x10000000000, ULL)
 #define SZ_64T				_AC(0x400000000000, ULL)
 
 #endif /* __LINUX_SIZES_H__ */