Message ID | 20211211212617.19639-1-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | [1/4] watchdog: rzg2l_wdt: Fix 32bit overflow issue | expand |
On 12/11/21 1:26 PM, Biju Das wrote: > The value of timer_cycle_us can be 0 due to 32bit overflow. > For eg:- If we assign the counter value "0xfff" for computing > maxval. > > This patch fixes this issue by appending ULL to 1024, so that > it is promoted to 64bit. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/rzg2l_wdt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c > index 6b426df34fd6..96f2a018ab62 100644 > --- a/drivers/watchdog/rzg2l_wdt.c > +++ b/drivers/watchdog/rzg2l_wdt.c > @@ -53,7 +53,7 @@ static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) > > static u32 rzg2l_wdt_get_cycle_usec(unsigned long cycle, u32 wdttime) > { > - u64 timer_cycle_us = 1024 * 1024 * (wdttime + 1) * MICRO; > + u64 timer_cycle_us = 1024 * 1024ULL * (wdttime + 1) * MICRO; > > return div64_ul(timer_cycle_us, cycle); > } >
On Sat, Dec 11, 2021 at 10:26 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > The value of timer_cycle_us can be 0 due to 32bit overflow. > For eg:- If we assign the counter value "0xfff" for computing > maxval. > > This patch fixes this issue by appending ULL to 1024, so that > it is promoted to 64bit. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c index 6b426df34fd6..96f2a018ab62 100644 --- a/drivers/watchdog/rzg2l_wdt.c +++ b/drivers/watchdog/rzg2l_wdt.c @@ -53,7 +53,7 @@ static void rzg2l_wdt_wait_delay(struct rzg2l_wdt_priv *priv) static u32 rzg2l_wdt_get_cycle_usec(unsigned long cycle, u32 wdttime) { - u64 timer_cycle_us = 1024 * 1024 * (wdttime + 1) * MICRO; + u64 timer_cycle_us = 1024 * 1024ULL * (wdttime + 1) * MICRO; return div64_ul(timer_cycle_us, cycle); }
The value of timer_cycle_us can be 0 due to 32bit overflow. For eg:- If we assign the counter value "0xfff" for computing maxval. This patch fixes this issue by appending ULL to 1024, so that it is promoted to 64bit. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- drivers/watchdog/rzg2l_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)