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[net-next,v2,09/13] net: dsa: realtek: rtl8365mb: rename extport to extint, add "realtek,ext-int"

Message ID 20211218081425.18722-10-luizluca@gmail.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series [net-next,v2,01/13] dt-bindings: net: dsa: realtek-smi: mark unsupported switches | expand

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Commit Message

Luiz Angelo Daros de Luca Dec. 18, 2021, 8:14 a.m. UTC 
"extport" 0, 1, 2 was used to reference external ports (ext0,
ext1, ext2). Meanwhile, port 0..9 is used as switch ports,
including external ports. "extport" was renamed to extint to
make it clear it does not mean the port number but the external
interface number.

The macros that map extint numbers to registers addresses now
use inline ifs instead of binary arithmetic.

"extint" was hardcoded to 1. Now it can be defined with a device-tree
port property "realtek,ext-int";

Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
---
 .../bindings/net/dsa/realtek-smi.txt          |   4 +
 drivers/net/dsa/realtek/rtl8365mb.c           | 106 ++++++++++++------
 2 files changed, 74 insertions(+), 36 deletions(-)

Comments

Alvin Šipraga Dec. 19, 2021, 10:45 p.m. UTC | #1 
On 12/18/21 09:14, Luiz Angelo Daros de Luca wrote:
> "extport" 0, 1, 2 was used to reference external ports (ext0,
> ext1, ext2). Meanwhile, port 0..9 is used as switch ports,
> including external ports. "extport" was renamed to extint to
> make it clear it does not mean the port number but the external
> interface number.
> 
> The macros that map extint numbers to registers addresses now
> use inline ifs instead of binary arithmetic.
> 
> "extint" was hardcoded to 1. Now it can be defined with a device-tree
> port property "realtek,ext-int";

It's worth mentioning that some of these switches have multiple 
EXT(ension) ports, and that's why you make it a per-port property.

My main problem with this rename is that it's not really consistent. 
Before the term EXT port was the only term used, but now you have 
introduced a new term without addressing all instances of the original.

Having said that, I agree that it can be confusing, and I think EXT 
interface (read: "realtek,ext-int") is a good disambiguation.

> 
> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
> ---
>   .../bindings/net/dsa/realtek-smi.txt          |   4 +
>   drivers/net/dsa/realtek/rtl8365mb.c           | 106 ++++++++++++------
>   2 files changed, 74 insertions(+), 36 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt b/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
> index ec96b4035ed5..310076be14b2 100644
> --- a/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
> @@ -62,6 +62,10 @@ See net/mdio.txt for additional MDIO bus properties.
>   See net/dsa/dsa.txt for a list of additional required and optional properties
>   and subnodes of DSA switches.
>   
> +Optional properties of dsa port:
> +
> +- realtek,ext-int: defines the external interface number (0, 1, 2). By default, 1.
> +
>   Examples:
>   
>   An example for the RTL8366RB:
> diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c
> index 11a985900c57..e87c60d9c8cb 100644
> --- a/drivers/net/dsa/realtek/rtl8365mb.c
> +++ b/drivers/net/dsa/realtek/rtl8365mb.c
> @@ -208,22 +208,26 @@
>   #define RTL8365MB_EXT_PORT_MODE_100FX		13
>   
>   /* EXT port interface mode configuration registers 0~1 */
> -#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0		0x1305
> -#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1		0x13C3
> -#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extport)   \
> -		(RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 + \
> -		 ((_extport) >> 1) * (0x13C3 - 0x1305))
> -#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extport) \
> -		(0xF << (((_extport) % 2)))
> -#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extport) \
> -		(((_extport) % 2) * 4)
> -
> -/* EXT port RGMII TX/RX delay configuration registers 1~2 */
> -#define RTL8365MB_EXT_RGMXF_REG1		0x1307
> -#define RTL8365MB_EXT_RGMXF_REG2		0x13C5
> -#define RTL8365MB_EXT_RGMXF_REG(_extport)   \
> -		(RTL8365MB_EXT_RGMXF_REG1 + \
> -		 (((_extport) >> 1) * (0x13C5 - 0x1307)))
> +#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0		0x1305 /*EXT1*/
> +#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1		0x13C3 /*EXT2*/
> +#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extint) \
> +		((_extint) == 1 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 : \
> +		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \
> +		 0x0)
> +#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \
> +		(0xF << (((_extint) % 2)))
> +#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extint) \
> +		(((_extint) % 2) * 4)
> +
> +/* EXT port RGMII TX/RX delay configuration registers 0~2 */

EXT port -> EXT interface?

> +#define RTL8365MB_EXT_RGMXF_REG0		0x1306 /*EXT0*/
> +#define RTL8365MB_EXT_RGMXF_REG1		0x1307 /*EXT1*/
> +#define RTL8365MB_EXT_RGMXF_REG2		0x13C5 /*EXT2*/
> +#define RTL8365MB_EXT_RGMXF_REG(_extint) \
> +		((_extint) == 0 ? RTL8365MB_EXT_RGMXF_REG0 : \
> +		 (_extint) == 1 ? RTL8365MB_EXT_RGMXF_REG1 : \
> +		 (_extint) == 2 ? RTL8365MB_EXT_RGMXF_REG2 : \
> +		 0x0)
>   #define   RTL8365MB_EXT_RGMXF_RXDELAY_MASK	0x0007
>   #define   RTL8365MB_EXT_RGMXF_TXDELAY_MASK	0x0008
>   
> @@ -233,13 +237,14 @@
>   #define RTL8365MB_PORT_SPEED_1000M	2
>   
>   /* EXT port force configuration registers 0~2 */

So, EXT port or EXT interface?

> -#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0			0x1310
> -#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1			0x1311
> -#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2			0x13C4
> -#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(_extport)   \
> -		(RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0 + \
> -		 ((_extport) & 0x1) +                     \
> -		 ((((_extport) >> 1) & 0x1) * (0x13C4 - 0x1310)))
> +#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0		0x1310 /*EXT0*/

Add spaces like /* EXT0 */ (but is a comment really needed?).
Same elsewhere.

> +#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1		0x1311 /*EXT1*/
> +#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2		0x13C4 /*EXT2*/
> +#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(_extint) \
> +		((_extint) == 0 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0 : \
> +		 (_extint) == 1 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1 : \
> +		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2 : \
> +		 0x0)
>   #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_EN_MASK		0x1000
>   #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_NWAY_MASK		0x0080
>   #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_TXPAUSE_MASK	0x0040
> @@ -522,6 +527,7 @@ struct rtl8365mb_cpu {
>    *         access via rtl8365mb_get_stats64
>    * @stats_lock: protect the stats structure during read/update
>    * @mib_work: delayed work for polling MIB counters
> + * @ext_int: the external interface related to this port (-1 to none)

s/to/if/

>    */
>   struct rtl8365mb_port {
>   	struct realtek_priv *priv;
> @@ -529,6 +535,7 @@ struct rtl8365mb_port {
>   	struct rtnl_link_stats64 stats;
>   	spinlock_t stats_lock;
>   	struct delayed_work mib_work;
> +	int ext_int;
>   };
>   
>   /**
> @@ -742,17 +749,17 @@ rtl8365mb_get_tag_protocol(struct dsa_switch *ds, int port,
>   static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
>   				      phy_interface_t interface)
>   {
> +	struct rtl8365mb_port *p;
>   	struct device_node *dn;
> +	struct rtl8365mb *mb;
>   	struct dsa_port *dp;
>   	int tx_delay = 0;
>   	int rx_delay = 0;
> -	int ext_port;
> +	int ext_int;
>   	u32 val;
>   	int ret;
>   
> -	if (port == priv->cpu_port) {
> -		ext_port = 1;
> -	} else {
> +	if (port != priv->cpu_port) {
>   		dev_err(priv->dev, "only one EXT port is currently supported\n");

For switches with multiple EXT ports, I guess this will change. Non-CPU 
EXT ports can be arranged in a fixed link and so this would get called. 
But that's my fault for not thinking about it at the time (the 
RTL8365MB-VC has only 1 EXT port which is used as a CPU port).

I haven't looked into this, but since your RTL8367S seems to have two 
EXT ports, are you perhaps able to try it out? That is if your hardware 
is making use of both EXT ports...

>   		return -EINVAL;
>   	}
> @@ -760,6 +767,10 @@ static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
>   	dp = dsa_to_port(priv->ds, port);
>   	dn = dp->dn;
>   
> +	mb = priv->chip_data;
> +	p = &mb->ports[port];
> +	ext_int = p->ext_int;
> +
>   	/* Set the RGMII TX/RX delay
>   	 *
>   	 * The Realtek vendor driver indicates the following possible
> @@ -803,7 +814,7 @@ static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
>   	}
>   
>   	ret = regmap_update_bits(
> -		priv->map, RTL8365MB_EXT_RGMXF_REG(ext_port),
> +		priv->map, RTL8365MB_EXT_RGMXF_REG(ext_int),
>   		RTL8365MB_EXT_RGMXF_TXDELAY_MASK |
>   			RTL8365MB_EXT_RGMXF_RXDELAY_MASK,
>   		FIELD_PREP(RTL8365MB_EXT_RGMXF_TXDELAY_MASK, tx_delay) |
> @@ -812,11 +823,11 @@ static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
>   		return ret;
>   
>   	ret = regmap_update_bits(
> -		priv->map, RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(ext_port),
> -		RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(ext_port),
> +		priv->map, RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(ext_int),
> +		RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(ext_int),
>   		RTL8365MB_EXT_PORT_MODE_RGMII
>   			<< RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(
> -				   ext_port));
> +				   ext_int));
>   	if (ret)
>   		return ret;
>   
> @@ -827,22 +838,26 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
>   					  bool link, int speed, int duplex,
>   					  bool tx_pause, bool rx_pause)
>   {
> +	struct rtl8365mb_port *p;
> +	struct rtl8365mb *mb;
>   	u32 r_tx_pause;
>   	u32 r_rx_pause;
>   	u32 r_duplex;
>   	u32 r_speed;
>   	u32 r_link;
> -	int ext_port;
> +	int ext_int;
>   	int val;
>   	int ret;
>   
> -	if (port == priv->cpu_port) {
> -		ext_port = 1;
> -	} else {
> +	if (port != priv->cpu_port) {
>   		dev_err(priv->dev, "only one EXT port is currently supported\n");

port -> interface

>   		return -EINVAL;
>   	}
>   
> +	mb = priv->chip_data;
> +	p = &mb->ports[port];
> +	ext_int = p->ext_int;
> +
>   	if (link) {
>   		/* Force the link up with the desired configuration */
>   		r_link = 1;
> @@ -889,7 +904,7 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
>   			 r_duplex) |
>   	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_SPEED_MASK, r_speed);
>   	ret = regmap_write(priv->map,
> -			   RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(ext_port),
> +			   RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(ext_int),
>   			   val);
>   	if (ret)
>   		return ret;
> @@ -1819,6 +1834,8 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
>   	/* Configure ports */
>   	for (i = 0; i < priv->num_ports; i++) {
>   		struct rtl8365mb_port *p = &mb->ports[i];
> +		struct device_node *dn;
> +		u32 val;
>   
>   		if (dsa_is_unused_port(priv->ds, i))
>   			continue;
> @@ -1842,6 +1859,23 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
>   		 * administratively down by default.
>   		 */
>   		rtl8365mb_port_stp_state_set(priv->ds, i, BR_STATE_DISABLED);
> +
> +		dn = dsa_to_port(priv->ds, i)->dn;

Move to top of loop?

> +
> +		if (!of_property_read_u32(dn, "realtek,ext-int", &val)) {

Can you move the whole /* Set up per-port private data */ block down 
here? Or move this configuration up there.

> +			if (val < 0 || val > 2) {
> +				dev_err(priv->dev,
> +					"realtek,ext-int must be between 0 and 2\n");
> +				return -EINVAL;
> +			}

Newline here

> +			p->ext_int = val;
> +		} else {
> +			if (dsa_is_cpu_port(priv->ds, i))
> +				/* existing default */

/* Default for compatibility with older device trees */ ?

> +				p->ext_int = 1;
> +			else
> +				p->ext_int = -1;
> +		}
>   	}
>   
>   	/* Set maximum packet length to 1536 bytes */
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt b/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
index ec96b4035ed5..310076be14b2 100644
--- a/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
+++ b/Documentation/devicetree/bindings/net/dsa/realtek-smi.txt
@@ -62,6 +62,10 @@  See net/mdio.txt for additional MDIO bus properties.
 See net/dsa/dsa.txt for a list of additional required and optional properties
 and subnodes of DSA switches.
 
+Optional properties of dsa port:
+
+- realtek,ext-int: defines the external interface number (0, 1, 2). By default, 1.
+
 Examples:
 
 An example for the RTL8366RB:
diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c
index 11a985900c57..e87c60d9c8cb 100644
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -208,22 +208,26 @@ 
 #define RTL8365MB_EXT_PORT_MODE_100FX		13
 
 /* EXT port interface mode configuration registers 0~1 */
-#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0		0x1305
-#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1		0x13C3
-#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extport)   \
-		(RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 + \
-		 ((_extport) >> 1) * (0x13C3 - 0x1305))
-#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extport) \
-		(0xF << (((_extport) % 2)))
-#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extport) \
-		(((_extport) % 2) * 4)
-
-/* EXT port RGMII TX/RX delay configuration registers 1~2 */
-#define RTL8365MB_EXT_RGMXF_REG1		0x1307
-#define RTL8365MB_EXT_RGMXF_REG2		0x13C5
-#define RTL8365MB_EXT_RGMXF_REG(_extport)   \
-		(RTL8365MB_EXT_RGMXF_REG1 + \
-		 (((_extport) >> 1) * (0x13C5 - 0x1307)))
+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0		0x1305 /*EXT1*/
+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1		0x13C3 /*EXT2*/
+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extint) \
+		((_extint) == 1 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 : \
+		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \
+		 0x0)
+#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \
+		(0xF << (((_extint) % 2)))
+#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extint) \
+		(((_extint) % 2) * 4)
+
+/* EXT port RGMII TX/RX delay configuration registers 0~2 */
+#define RTL8365MB_EXT_RGMXF_REG0		0x1306 /*EXT0*/
+#define RTL8365MB_EXT_RGMXF_REG1		0x1307 /*EXT1*/
+#define RTL8365MB_EXT_RGMXF_REG2		0x13C5 /*EXT2*/
+#define RTL8365MB_EXT_RGMXF_REG(_extint) \
+		((_extint) == 0 ? RTL8365MB_EXT_RGMXF_REG0 : \
+		 (_extint) == 1 ? RTL8365MB_EXT_RGMXF_REG1 : \
+		 (_extint) == 2 ? RTL8365MB_EXT_RGMXF_REG2 : \
+		 0x0)
 #define   RTL8365MB_EXT_RGMXF_RXDELAY_MASK	0x0007
 #define   RTL8365MB_EXT_RGMXF_TXDELAY_MASK	0x0008
 
@@ -233,13 +237,14 @@ 
 #define RTL8365MB_PORT_SPEED_1000M	2
 
 /* EXT port force configuration registers 0~2 */
-#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0			0x1310
-#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1			0x1311
-#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2			0x13C4
-#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(_extport)   \
-		(RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0 + \
-		 ((_extport) & 0x1) +                     \
-		 ((((_extport) >> 1) & 0x1) * (0x13C4 - 0x1310)))
+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0		0x1310 /*EXT0*/
+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1		0x1311 /*EXT1*/
+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2		0x13C4 /*EXT2*/
+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(_extint) \
+		((_extint) == 0 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0 : \
+		 (_extint) == 1 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1 : \
+		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2 : \
+		 0x0)
 #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_EN_MASK		0x1000
 #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_NWAY_MASK		0x0080
 #define   RTL8365MB_DIGITAL_INTERFACE_FORCE_TXPAUSE_MASK	0x0040
@@ -522,6 +527,7 @@  struct rtl8365mb_cpu {
  *         access via rtl8365mb_get_stats64
  * @stats_lock: protect the stats structure during read/update
  * @mib_work: delayed work for polling MIB counters
+ * @ext_int: the external interface related to this port (-1 to none)
  */
 struct rtl8365mb_port {
 	struct realtek_priv *priv;
@@ -529,6 +535,7 @@  struct rtl8365mb_port {
 	struct rtnl_link_stats64 stats;
 	spinlock_t stats_lock;
 	struct delayed_work mib_work;
+	int ext_int;
 };
 
 /**
@@ -742,17 +749,17 @@  rtl8365mb_get_tag_protocol(struct dsa_switch *ds, int port,
 static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
 				      phy_interface_t interface)
 {
+	struct rtl8365mb_port *p;
 	struct device_node *dn;
+	struct rtl8365mb *mb;
 	struct dsa_port *dp;
 	int tx_delay = 0;
 	int rx_delay = 0;
-	int ext_port;
+	int ext_int;
 	u32 val;
 	int ret;
 
-	if (port == priv->cpu_port) {
-		ext_port = 1;
-	} else {
+	if (port != priv->cpu_port) {
 		dev_err(priv->dev, "only one EXT port is currently supported\n");
 		return -EINVAL;
 	}
@@ -760,6 +767,10 @@  static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
 	dp = dsa_to_port(priv->ds, port);
 	dn = dp->dn;
 
+	mb = priv->chip_data;
+	p = &mb->ports[port];
+	ext_int = p->ext_int;
+
 	/* Set the RGMII TX/RX delay
 	 *
 	 * The Realtek vendor driver indicates the following possible
@@ -803,7 +814,7 @@  static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
 	}
 
 	ret = regmap_update_bits(
-		priv->map, RTL8365MB_EXT_RGMXF_REG(ext_port),
+		priv->map, RTL8365MB_EXT_RGMXF_REG(ext_int),
 		RTL8365MB_EXT_RGMXF_TXDELAY_MASK |
 			RTL8365MB_EXT_RGMXF_RXDELAY_MASK,
 		FIELD_PREP(RTL8365MB_EXT_RGMXF_TXDELAY_MASK, tx_delay) |
@@ -812,11 +823,11 @@  static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
 		return ret;
 
 	ret = regmap_update_bits(
-		priv->map, RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(ext_port),
-		RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(ext_port),
+		priv->map, RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(ext_int),
+		RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(ext_int),
 		RTL8365MB_EXT_PORT_MODE_RGMII
 			<< RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(
-				   ext_port));
+				   ext_int));
 	if (ret)
 		return ret;
 
@@ -827,22 +838,26 @@  static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
 					  bool link, int speed, int duplex,
 					  bool tx_pause, bool rx_pause)
 {
+	struct rtl8365mb_port *p;
+	struct rtl8365mb *mb;
 	u32 r_tx_pause;
 	u32 r_rx_pause;
 	u32 r_duplex;
 	u32 r_speed;
 	u32 r_link;
-	int ext_port;
+	int ext_int;
 	int val;
 	int ret;
 
-	if (port == priv->cpu_port) {
-		ext_port = 1;
-	} else {
+	if (port != priv->cpu_port) {
 		dev_err(priv->dev, "only one EXT port is currently supported\n");
 		return -EINVAL;
 	}
 
+	mb = priv->chip_data;
+	p = &mb->ports[port];
+	ext_int = p->ext_int;
+
 	if (link) {
 		/* Force the link up with the desired configuration */
 		r_link = 1;
@@ -889,7 +904,7 @@  static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
 			 r_duplex) |
 	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_SPEED_MASK, r_speed);
 	ret = regmap_write(priv->map,
-			   RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(ext_port),
+			   RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(ext_int),
 			   val);
 	if (ret)
 		return ret;
@@ -1819,6 +1834,8 @@  static int rtl8365mb_setup(struct dsa_switch *ds)
 	/* Configure ports */
 	for (i = 0; i < priv->num_ports; i++) {
 		struct rtl8365mb_port *p = &mb->ports[i];
+		struct device_node *dn;
+		u32 val;
 
 		if (dsa_is_unused_port(priv->ds, i))
 			continue;
@@ -1842,6 +1859,23 @@  static int rtl8365mb_setup(struct dsa_switch *ds)
 		 * administratively down by default.
 		 */
 		rtl8365mb_port_stp_state_set(priv->ds, i, BR_STATE_DISABLED);
+
+		dn = dsa_to_port(priv->ds, i)->dn;
+
+		if (!of_property_read_u32(dn, "realtek,ext-int", &val)) {
+			if (val < 0 || val > 2) {
+				dev_err(priv->dev,
+					"realtek,ext-int must be between 0 and 2\n");
+				return -EINVAL;
+			}
+			p->ext_int = val;
+		} else {
+			if (dsa_is_cpu_port(priv->ds, i))
+				/* existing default */
+				p->ext_int = 1;
+			else
+				p->ext_int = -1;
+		}
 	}
 
 	/* Set maximum packet length to 1536 bytes */