| Message ID | 20211103102607.12277-1-yc.hung@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v5] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support | expand |
On Wed, Nov 03, 2021 at 06:26:08PM +0800, YC Hung wrote: > From: "yc.hung" <yc.hung@mediatek.com> > > This describes the mt8195 DSP device tree node. > > Signed-off-by: yc.hung <yc.hung@mediatek.com> > --- > Changes since v4: > - remove patch 1 with clocks as it will be reviewed and merged to SOF tree. > https://github.com/thesofproject/linux/pull/3237 > - refine DT file binding files with Rob's comments. > > .../bindings/dsp/mtk,mt8195-dsp.yaml | 142 ++++++++++++++++++ > 1 file changed, 142 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml > > diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml > new file mode 100644 > index 000000000000..aeeb7af69625 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml > @@ -0,0 +1,142 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek mt8195 DSP core > + > +maintainers: > + - YC Hung <yc.hung@mediatek.com> > + > +description: | > + Some boards from mt8195 contain a DSP core used for > + advanced pre- and post- audio processing. > +properties: > + compatible: > + const: mediatek,mt8195-dsp > + > + reg: > + items: > + - description: Address and size of the DSP Cfg registers > + - description: Address and size of the DSP SRAM > + > + reg-names: > + items: > + - const: cfg > + - const: sram > + > + interrupts: > + items: > + - description: watchdog interrupt > + > + interrupt-names: > + items: > + - const: wdt > + > + clocks: > + items: > + - description: mux for audio dsp clock > + - description: 26M clock > + - description: mux for audio dsp local bus > + - description: default audio dsp local bus clock source > + - description: clock gate for audio dsp clock > + - description: mux for audio dsp access external bus > + > + clock-names: > + items: > + - const: adsp_sel > + - const: clk26m_ck > + - const: audio_local_bus > + - const: mainpll_d7_d2 > + - const: scp_adsp_audiodsp > + - const: audio_h > + > + power-domains: > + maxItems: 1 > + > + mboxes: > + items: > + - description: a mailbox is ised for ipc reply between host and audio DSP. > + - description: a mailbox is ised for ipc reuqest between host and audio DSP. > + > + mbox-names: > + items: > + - const: mbox0 > + - const: mbox1 > + > + memory-region: > + items: > + - description: A phandle to a reserved memory region is used for dma buffer between host and DSP. > + - description: A phandle to a reserved memory region is used for DSP system memory. > + > + sound: > + description: > + Sound subnode includes ASoC platform, DPTx codec node, and > + HDMI codec node. > + > + type: object Same question as v4, why do you need a sub-node here. Just move these properties up a level. > + > + properties: > + mediatek,platform: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: The phandle of MT8195 ASoC platform. > + > + mediatek,dptx-codec: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: The phandle of MT8195 Display Port Tx codec node. > + > + mediatek,hdmi-codec: > + $ref: "/schemas/types.yaml#/definitions/phandle" > + description: The phandle of MT8195 HDMI codec node.
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml new file mode 100644 index 000000000000..aeeb7af69625 --- /dev/null +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek mt8195 DSP core + +maintainers: + - YC Hung <yc.hung@mediatek.com> + +description: | + Some boards from mt8195 contain a DSP core used for + advanced pre- and post- audio processing. +properties: + compatible: + const: mediatek,mt8195-dsp + + reg: + items: + - description: Address and size of the DSP Cfg registers + - description: Address and size of the DSP SRAM + + reg-names: + items: + - const: cfg + - const: sram + + interrupts: + items: + - description: watchdog interrupt + + interrupt-names: + items: + - const: wdt + + clocks: + items: + - description: mux for audio dsp clock + - description: 26M clock + - description: mux for audio dsp local bus + - description: default audio dsp local bus clock source + - description: clock gate for audio dsp clock + - description: mux for audio dsp access external bus + + clock-names: + items: + - const: adsp_sel + - const: clk26m_ck + - const: audio_local_bus + - const: mainpll_d7_d2 + - const: scp_adsp_audiodsp + - const: audio_h + + power-domains: + maxItems: 1 + + mboxes: + items: + - description: a mailbox is ised for ipc reply between host and audio DSP. + - description: a mailbox is ised for ipc reuqest between host and audio DSP. + + mbox-names: + items: + - const: mbox0 + - const: mbox1 + + memory-region: + items: + - description: A phandle to a reserved memory region is used for dma buffer between host and DSP. + - description: A phandle to a reserved memory region is used for DSP system memory. + + sound: + description: + Sound subnode includes ASoC platform, DPTx codec node, and + HDMI codec node. + + type: object + + properties: + mediatek,platform: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 ASoC platform. + + mediatek,dptx-codec: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 Display Port Tx codec node. + + mediatek,hdmi-codec: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 HDMI codec node. + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - memory-region + - power-domains + - mbox-names + - mboxes + - sound + +additionalProperties: true + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + adsp: dsp@10803000 { + compatible = "mediatek,mt8195-dsp"; + reg = <0x10803000 0x1000>, + <0x10840000 0x40000>; + reg-names = "cfg", "sram"; + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "wdt"; + clocks = <&topckgen 10>, //CLK_TOP_ADSP + <&clk26m>, + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2 + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP + <&topckgen 34>; //CLK_TOP_AUDIO_H + clock-names = "adsp_sel", + "clk26m_ck", + "audio_local_bus", + "mainpll_d7_d2", + "scp_adsp_audiodsp", + "audio_h"; + memory-region = <&adsp_dma_mem_reserved>, + <&adsp_mem_reserved>; + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP + mbox-names = "mbox0", "mbox1"; + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>; + sound { + mediatek,dptx-codec = <&dp_tx>; + mediatek,hdmi-codec = <&hdmi0>; + mediatek,platform = <&afe>; + }; + };