| Message ID | 20211124021325.858139-1-knaerzche@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568 | expand |
Le 24/11/2021 à 03:13, Alex Bee a écrit : > With the submission of iommu driver for RK3568 a subtle bug was > introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be > the other way arround - that leads to random errors, especially when > addresses beyond 32 bit are used. > > Fix it. > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > Signed-off-by: Alex Bee <knaerzche@gmail.com> Thanks for the fix. Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > --- > > I've found this bug, when testing the recent VOP2 submission, which is > the first perpherial which uses iommu for RK356x. I could use it on my > quartz64 8GB board only, when limiting the available memory to less 4GB. > > This patch fixes it. > > drivers/iommu/rockchip-iommu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c > index 5cb260820eda..7f23ad61c094 100644 > --- a/drivers/iommu/rockchip-iommu.c > +++ b/drivers/iommu/rockchip-iommu.c > @@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) > #define DTE_HI_MASK2 GENMASK(7, 4) > #define DTE_HI_SHIFT1 24 /* shift bit 8 to bit 32 */ > #define DTE_HI_SHIFT2 32 /* shift bit 4 to bit 36 */ > -#define PAGE_DESC_HI_MASK1 GENMASK_ULL(39, 36) > -#define PAGE_DESC_HI_MASK2 GENMASK_ULL(35, 32) > +#define PAGE_DESC_HI_MASK1 GENMASK_ULL(35, 32) > +#define PAGE_DESC_HI_MASK2 GENMASK_ULL(39, 36) > > static inline phys_addr_t rk_dte_pt_address_v2(u32 dte) > {
Am Mittwoch, 24. November 2021, 03:13:25 CET schrieb Alex Bee: > With the submission of iommu driver for RK3568 a subtle bug was > introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be > the other way arround - that leads to random errors, especially when > addresses beyond 32 bit are used. > > Fix it. > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > Signed-off-by: Alex Bee <knaerzche@gmail.com> > --- > > I've found this bug, when testing the recent VOP2 submission, which is > the first perpherial which uses iommu for RK356x. I could use it on my > quartz64 8GB board only, when limiting the available memory to less 4GB. > > This patch fixes it. > > drivers/iommu/rockchip-iommu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c > index 5cb260820eda..7f23ad61c094 100644 > --- a/drivers/iommu/rockchip-iommu.c > +++ b/drivers/iommu/rockchip-iommu.c > @@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) > #define DTE_HI_MASK2 GENMASK(7, 4) > #define DTE_HI_SHIFT1 24 /* shift bit 8 to bit 32 */ > #define DTE_HI_SHIFT2 32 /* shift bit 4 to bit 36 */ > -#define PAGE_DESC_HI_MASK1 GENMASK_ULL(39, 36) > -#define PAGE_DESC_HI_MASK2 GENMASK_ULL(35, 32) > +#define PAGE_DESC_HI_MASK1 GENMASK_ULL(35, 32) > +#define PAGE_DESC_HI_MASK2 GENMASK_ULL(39, 36) With this change the PAGE_DESC_HI_MASK* now match the other constants above them in what bits they access, so Reviewed-by: Heiko Stuebner <heiko@sntech.de>
On Wed, Nov 24, 2021 at 5:36 AM Heiko Stübner <heiko@sntech.de> wrote: > > Am Mittwoch, 24. November 2021, 03:13:25 CET schrieb Alex Bee: > > With the submission of iommu driver for RK3568 a subtle bug was > > introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be > > the other way arround - that leads to random errors, especially when > > addresses beyond 32 bit are used. > > > > Fix it. > > > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > > Signed-off-by: Alex Bee <knaerzche@gmail.com> > > --- > > > > I've found this bug, when testing the recent VOP2 submission, which is > > the first perpherial which uses iommu for RK356x. I could use it on my > > quartz64 8GB board only, when limiting the available memory to less 4GB. > > > > This patch fixes it. > > > > drivers/iommu/rockchip-iommu.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c > > index 5cb260820eda..7f23ad61c094 100644 > > --- a/drivers/iommu/rockchip-iommu.c > > +++ b/drivers/iommu/rockchip-iommu.c > > @@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) > > #define DTE_HI_MASK2 GENMASK(7, 4) > > #define DTE_HI_SHIFT1 24 /* shift bit 8 to bit 32 */ > > #define DTE_HI_SHIFT2 32 /* shift bit 4 to bit 36 */ > > -#define PAGE_DESC_HI_MASK1 GENMASK_ULL(39, 36) > > -#define PAGE_DESC_HI_MASK2 GENMASK_ULL(35, 32) > > +#define PAGE_DESC_HI_MASK1 GENMASK_ULL(35, 32) > > +#define PAGE_DESC_HI_MASK2 GENMASK_ULL(39, 36) > > With this change the PAGE_DESC_HI_MASK* now match the other > constants above them in what bits they access, so > > Reviewed-by: Heiko Stuebner <heiko@sntech.de> > > Tested on the quartz64-a board with the experimental vop2 driver, confirmed it fixed the issue. Tested-by: Peter Geis <pgwipeout@gmail.com> > > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip
On Wed, Nov 24, 2021 at 03:13:25AM +0100, Alex Bee wrote: > With the submission of iommu driver for RK3568 a subtle bug was > introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be > the other way arround - that leads to random errors, especially when > addresses beyond 32 bit are used. > > Fix it. > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > Signed-off-by: Alex Bee <knaerzche@gmail.com> Applied for v5.16, thanks.
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 5cb260820eda..7f23ad61c094 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) #define DTE_HI_MASK2 GENMASK(7, 4) #define DTE_HI_SHIFT1 24 /* shift bit 8 to bit 32 */ #define DTE_HI_SHIFT2 32 /* shift bit 4 to bit 36 */ -#define PAGE_DESC_HI_MASK1 GENMASK_ULL(39, 36) -#define PAGE_DESC_HI_MASK2 GENMASK_ULL(35, 32) +#define PAGE_DESC_HI_MASK1 GENMASK_ULL(35, 32) +#define PAGE_DESC_HI_MASK2 GENMASK_ULL(39, 36) static inline phys_addr_t rk_dte_pt_address_v2(u32 dte) {
With the submission of iommu driver for RK3568 a subtle bug was introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be the other way arround - that leads to random errors, especially when addresses beyond 32 bit are used. Fix it. Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") Signed-off-by: Alex Bee <knaerzche@gmail.com> --- I've found this bug, when testing the recent VOP2 submission, which is the first perpherial which uses iommu for RK356x. I could use it on my quartz64 8GB board only, when limiting the available memory to less 4GB. This patch fixes it. drivers/iommu/rockchip-iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)