diff mbox series

[v1,2/4] spi: spi-mtk-nor: improve device table for adding more capabilities

Message ID 20220114062408.9077-3-guochun.mao@mediatek.com (mailing list archive)
State New, archived
Headers show
Series mainly add a new SoC support for spi-mtk-nor | expand

Commit Message

Guochun Mao Jan. 14, 2022, 6:24 a.m. UTC 
From: Guochun Mao <guochun.mao@mediatek.com>

Define a structure for adding more capabilities.

Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com>
---
 drivers/spi/spi-mtk-nor.c | 40 +++++++++++++++++++++++++++++++--------
 1 file changed, 32 insertions(+), 8 deletions(-)

Comments

AngeloGioacchino Del Regno Jan. 14, 2022, 10:40 a.m. UTC | #1 
Il 14/01/22 07:24, guochun.mao@mediatek.com ha scritto:
> From: Guochun Mao <guochun.mao@mediatek.com>

Hello Guochun,

thanks for the patch! However, I have some comments...

> 
> Define a structure for adding more capabilities.

Please also mention that you're adding the extra_dummy_bit feature
in the commit description.

> 
> Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
> Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com>
> ---
>   drivers/spi/spi-mtk-nor.c | 40 +++++++++++++++++++++++++++++++--------
>   1 file changed, 32 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c
> index 5c93730615f8..f3bcdc1d4d8b 100644
> --- a/drivers/spi/spi-mtk-nor.c
> +++ b/drivers/spi/spi-mtk-nor.c
> @@ -95,6 +95,11 @@
>   
>   #define CLK_TO_US(sp, clkcnt)		DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000)
>   
> +struct mtk_nor_caps {
> +	u32 dma_bits;

dma_bits can be u8: I really don't think that we'll ever see more than
0xff bits...

> +	u32 extra_dummy_bit;

This one looks a bit strange, can you please add a comment explaining the
reason why we have this "extra dummy bit"?

> +};
> +
>   struct mtk_nor {
>   	struct spi_controller *ctlr;
>   	struct device *dev;
> @@ -109,6 +114,7 @@ struct mtk_nor {
>   	bool has_irq;
>   	bool high_dma;
>   	struct completion op_done;
> +	const struct mtk_nor_caps *caps;
>   };
>   
>   static inline void mtk_nor_rmw(struct mtk_nor *sp, u32 reg, u32 set, u32 clr)
> @@ -554,7 +560,12 @@ static int mtk_nor_spi_mem_prg(struct mtk_nor *sp, const struct spi_mem_op *op)
>   	}
>   
>   	// trigger op
> -	writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);
> +	if (rx_len)
> +		writel(prg_len * BITS_PER_BYTE + sp->caps->extra_dummy_bit,
> +		       sp->base + MTK_NOR_REG_PRG_CNT);
> +	else
> +		writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);
> +
>   	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
>   			       prg_len * BITS_PER_BYTE);
>   	if (ret)
> @@ -743,9 +754,19 @@ static const struct spi_controller_mem_ops mtk_nor_mem_ops = {
>   	.exec_op = mtk_nor_exec_op
>   };
>   
> +const struct mtk_nor_caps mtk_nor_caps_mt8173 = {
> +	.dma_bits = 32,
> +	.extra_dummy_bit = 0,
> +};
> +
> +const struct mtk_nor_caps mtk_nor_caps_mt8192 = {
> +	.dma_bits = 36,
> +	.extra_dummy_bit = 0,
> +};
> +
>   static const struct of_device_id mtk_nor_match[] = {
> -	{ .compatible = "mediatek,mt8192-nor", .data = (void *)36 },
> -	{ .compatible = "mediatek,mt8173-nor", .data = (void *)32 },
> +	{ .compatible = "mediatek,mt8173-nor", .data = &mtk_nor_caps_mt8173 },
> +	{ .compatible = "mediatek,mt8192-nor", .data = &mtk_nor_caps_mt8192 },
>   	{ /* sentinel */ }
>   };
>   MODULE_DEVICE_TABLE(of, mtk_nor_match);
> @@ -754,10 +775,10 @@ static int mtk_nor_probe(struct platform_device *pdev)
>   {
>   	struct spi_controller *ctlr;
>   	struct mtk_nor *sp;
> +	struct mtk_nor_caps *caps;
>   	void __iomem *base;
>   	struct clk *spi_clk, *ctlr_clk, *axi_clk;
>   	int ret, irq;
> -	unsigned long dma_bits;
>   
>   	base = devm_platform_ioremap_resource(pdev, 0);
>   	if (IS_ERR(base))
> @@ -775,9 +796,11 @@ static int mtk_nor_probe(struct platform_device *pdev)
>   	if (IS_ERR(axi_clk))
>   		return PTR_ERR(axi_clk);
>   
> -	dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev);
> -	if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) {
> -		dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits);
> +	caps = (struct mtk_nor_caps *)of_device_get_match_data(&pdev->dev);
> +	if (dma_set_mask_and_coherent(&pdev->dev,
> +				      DMA_BIT_MASK(caps->dma_bits))) {

While you're at it, can you please also make this return the right value?
The function dma_set_mask_and_coherent() may return an error code, so it's
worth it to just return that.

P.S.: 83 columns is ok

	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(caps->dma_bits));
	if (ret) {

> +		dev_err(&pdev->dev, "failed to set dma mask(%u)\n",
> +			caps->dma_bits);
>   		return -EINVAL;
>   	}
>   
> @@ -808,7 +831,8 @@ static int mtk_nor_probe(struct platform_device *pdev)
>   	sp->spi_clk = spi_clk;
>   	sp->ctlr_clk = ctlr_clk;
>   	sp->axi_clk = axi_clk;
> -	sp->high_dma = (dma_bits > 32);
> +	sp->caps = caps;
> +	sp->high_dma = caps->dma_bits > 32;
>   	sp->buffer = dmam_alloc_coherent(&pdev->dev,
>   				MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN,
>   				&sp->buffer_dma, GFP_KERNEL);
> 

Regards,
- Angelo
Guochun Mao Jan. 17, 2022, 2:30 a.m. UTC | #2 
Hello Angelo,

Thanks for your comments.

On Fri, 2022-01-14 at 11:40 +0100, AngeloGioacchino Del Regno wrote:
> Il 14/01/22 07:24, guochun.mao@mediatek.com ha scritto:
> > From: Guochun Mao <guochun.mao@mediatek.com>
> 
> Hello Guochun,
> 
> thanks for the patch! However, I have some comments...
> 
> > 
> > Define a structure for adding more capabilities.
> 
> Please also mention that you're adding the extra_dummy_bit feature
> in the commit description.
> 
> > 
> > +struct mtk_nor_caps {
> > +	u32 dma_bits;
> 
> dma_bits can be u8: I really don't think that we'll ever see more
> than
> 0xff bits...
> 

I'll fix it next version.

> > +	u32 extra_dummy_bit;
> 
> This one looks a bit strange, can you please add a comment explaining
> the
> reason why we have this "extra dummy bit"?
> 

This one is adding for mt8186, which extra_dummy_bit is set to be 1.
Due to the IP design, it need a extra_dummy bit when reading nor
flash's register(status/config...).

Do you think I should move the modification to another patch
"[PATCH v1 3/4]spi:spi-mtk-nor:add new soc mt8186 sopport" ?
Or I just add this comment here?

> > 
> >   	// trigger op
> > -	writel(prg_len * BITS_PER_BYTE, sp->base +
> > MTK_NOR_REG_PRG_CNT);
> > +	if (rx_len)
> > +		writel(prg_len * BITS_PER_BYTE + sp->caps-
> > >extra_dummy_bit,
> > +		       sp->base + MTK_NOR_REG_PRG_CNT);
> > +	else
> > +		writel(prg_len * BITS_PER_BYTE, sp->base +
> > MTK_NOR_REG_PRG_CNT);
> > +
> >   	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
> >   			       prg_len * BITS_PER_BYTE);
> >   	if (ret)
> > @@ -743,9 +754,19 @@ static const struct spi_controller_mem_ops
> > mtk_nor_mem_ops = {
> >   	.exec_op = mtk_nor_exec_op
> >   };
> >   
> > +const struct mtk_nor_caps mtk_nor_caps_mt8173 = {
> > +	.dma_bits = 32,
> > +	.extra_dummy_bit = 0,
> > +};
> > +
> > +const struct mtk_nor_caps mtk_nor_caps_mt8192 = {
> > +	.dma_bits = 36,
> > +	.extra_dummy_bit = 0,
> > +};
> > +
> >   static const struct of_device_id mtk_nor_match[] = {
> > -	{ .compatible = "mediatek,mt8192-nor", .data = (void *)36 },
> > -	{ .compatible = "mediatek,mt8173-nor", .data = (void *)32 },
> > +	{ .compatible = "mediatek,mt8173-nor", .data =
> > &mtk_nor_caps_mt8173 },
> > +	{ .compatible = "mediatek,mt8192-nor", .data =
> > &mtk_nor_caps_mt8192 },
> >   	{ /* sentinel */ }
>   };
> >   MODULE_DEVICE_TABLE(of, mtk_nor_match);
> > @@ -754,10 +775,10 @@ static int mtk_nor_probe(struct
> > platform_device *pdev)
> >   {
> >   	struct spi_controller *ctlr;
> >   	struct mtk_nor *sp;
> > +	struct mtk_nor_caps *caps;
> >   	void __iomem *base;
> >   	struct clk *spi_clk, *ctlr_clk, *axi_clk;
> >   	int ret, irq;
> > -	unsigned long dma_bits;
> >   
> >   	base = devm_platform_ioremap_resource(pdev, 0);
> >   	if (IS_ERR(base))
> > @@ -775,9 +796,11 @@ static int mtk_nor_probe(struct
> > platform_device *pdev)
> >   	if (IS_ERR(axi_clk))
> >   		return PTR_ERR(axi_clk);
>   
> > -	dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev);
> > -	if (dma_set_mask_and_coherent(&pdev->dev,
> > DMA_BIT_MASK(dma_bits))) {
> > -		dev_err(&pdev->dev, "failed to set dma mask(%lu)\n",
> > dma_bits);
> > +	caps = (struct mtk_nor_caps *)of_device_get_match_data(&pdev-
> > >dev);
> > +	if (dma_set_mask_and_coherent(&pdev->dev,
> > +				      DMA_BIT_MASK(caps->dma_bits))) {
> 
> While you're at it, can you please also make this return the right
> value?
> The function dma_set_mask_and_coherent() may return an error code, so
> it's
> worth it to just return that.
> 
> P.S.: 83 columns is ok
> 

ok, I'll fix it next version.
Thanks.

BR,
Guochun
AngeloGioacchino Del Regno Jan. 17, 2022, 10:16 a.m. UTC | #3 
Il 17/01/22 03:30, Guochun Mao ha scritto:
> Hello Angelo,
> 
> Thanks for your comments.
> 
> On Fri, 2022-01-14 at 11:40 +0100, AngeloGioacchino Del Regno wrote:
>> Il 14/01/22 07:24, guochun.mao@mediatek.com ha scritto:
>>> From: Guochun Mao <guochun.mao@mediatek.com>
>>
>> Hello Guochun,
>>
>> thanks for the patch! However, I have some comments...
>>
>>>
>>> Define a structure for adding more capabilities.
>>
>> Please also mention that you're adding the extra_dummy_bit feature
>> in the commit description.
>>
>>>
>>> +struct mtk_nor_caps {
>>> +	u32 dma_bits;
>>
>> dma_bits can be u8: I really don't think that we'll ever see more
>> than
>> 0xff bits...
>>
> 
> I'll fix it next version.
> 
>>> +	u32 extra_dummy_bit;
>>
>> This one looks a bit strange, can you please add a comment explaining
>> the
>> reason why we have this "extra dummy bit"?
>>
> 
> This one is adding for mt8186, which extra_dummy_bit is set to be 1.
> Due to the IP design, it need a extra_dummy bit when reading nor
> flash's register(status/config...).
> 
> Do you think I should move the modification to another patch
> "[PATCH v1 3/4]spi:spi-mtk-nor:add new soc mt8186 sopport" ?
> Or I just add this comment here?
> 

It's more appropriate to keep it in this patch and mentioning it into
the commit description. Also, please add this comment in the code and,
if possible, also explain why this IP design needs an extra dummy bit.
Otherwise, if not possible, the provided explaination would also be fine.

Thanks,
- Angelo

>>>
>>>    	// trigger op
>>> -	writel(prg_len * BITS_PER_BYTE, sp->base +
>>> MTK_NOR_REG_PRG_CNT);
>>> +	if (rx_len)
>>> +		writel(prg_len * BITS_PER_BYTE + sp->caps-
>>>> extra_dummy_bit,
>>> +		       sp->base + MTK_NOR_REG_PRG_CNT);
>>> +	else
>>> +		writel(prg_len * BITS_PER_BYTE, sp->base +
>>> MTK_NOR_REG_PRG_CNT);
>>> +
>>>    	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
>>>    			       prg_len * BITS_PER_BYTE);
>>>    	if (ret)
>>> @@ -743,9 +754,19 @@ static const struct spi_controller_mem_ops
>>> mtk_nor_mem_ops = {
>>>    	.exec_op = mtk_nor_exec_op
>>>    };
>>>    
>>> +const struct mtk_nor_caps mtk_nor_caps_mt8173 = {
>>> +	.dma_bits = 32,
>>> +	.extra_dummy_bit = 0,
>>> +};
>>> +
>>> +const struct mtk_nor_caps mtk_nor_caps_mt8192 = {
>>> +	.dma_bits = 36,
>>> +	.extra_dummy_bit = 0,
>>> +};
>>> +
>>>    static const struct of_device_id mtk_nor_match[] = {
>>> -	{ .compatible = "mediatek,mt8192-nor", .data = (void *)36 },
>>> -	{ .compatible = "mediatek,mt8173-nor", .data = (void *)32 },
>>> +	{ .compatible = "mediatek,mt8173-nor", .data =
>>> &mtk_nor_caps_mt8173 },
>>> +	{ .compatible = "mediatek,mt8192-nor", .data =
>>> &mtk_nor_caps_mt8192 },
>>>    	{ /* sentinel */ }
>>    };
>>>    MODULE_DEVICE_TABLE(of, mtk_nor_match);
>>> @@ -754,10 +775,10 @@ static int mtk_nor_probe(struct
>>> platform_device *pdev)
>>>    {
>>>    	struct spi_controller *ctlr;
>>>    	struct mtk_nor *sp;
>>> +	struct mtk_nor_caps *caps;
>>>    	void __iomem *base;
>>>    	struct clk *spi_clk, *ctlr_clk, *axi_clk;
>>>    	int ret, irq;
>>> -	unsigned long dma_bits;
>>>    
>>>    	base = devm_platform_ioremap_resource(pdev, 0);
>>>    	if (IS_ERR(base))
>>> @@ -775,9 +796,11 @@ static int mtk_nor_probe(struct
>>> platform_device *pdev)
>>>    	if (IS_ERR(axi_clk))
>>>    		return PTR_ERR(axi_clk);
>>    
>>> -	dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev);
>>> -	if (dma_set_mask_and_coherent(&pdev->dev,
>>> DMA_BIT_MASK(dma_bits))) {
>>> -		dev_err(&pdev->dev, "failed to set dma mask(%lu)\n",
>>> dma_bits);
>>> +	caps = (struct mtk_nor_caps *)of_device_get_match_data(&pdev-
>>>> dev);
>>> +	if (dma_set_mask_and_coherent(&pdev->dev,
>>> +				      DMA_BIT_MASK(caps->dma_bits))) {
>>
>> While you're at it, can you please also make this return the right
>> value?
>> The function dma_set_mask_and_coherent() may return an error code, so
>> it's
>> worth it to just return that.
>>
>> P.S.: 83 columns is ok
>>
> 
> ok, I'll fix it next version.
> Thanks.
> 
> BR,
> Guochun
>
Guochun Mao Jan. 18, 2022, 1:12 a.m. UTC | #4 
On Mon, 2022-01-17 at 11:16 +0100, AngeloGioacchino Del Regno wrote:
> Il 17/01/22 03:30, Guochun Mao ha scritto:
> > Hello Angelo,
> > 
> > Thanks for your comments.
> > 
> > On Fri, 2022-01-14 at 11:40 +0100, AngeloGioacchino Del Regno
> > wrote:
> > > Il 14/01/22 07:24, guochun.mao@mediatek.com ha scritto:
> > > > From: Guochun Mao <guochun.mao@mediatek.com>
> > > 
> > > Hello Guochun,
> > > 
> > > thanks for the patch! However, I have some comments...
> > > 
> > > > 
> > > > Define a structure for adding more capabilities.
> > > 
> > > Please also mention that you're adding the extra_dummy_bit
> > > feature
> > > in the commit description.
> > > 
> > > > 
> > > > +struct mtk_nor_caps {
> > > > +	u32 dma_bits;
> > > 
> > > dma_bits can be u8: I really don't think that we'll ever see more
> > > than
> > > 0xff bits...
> > > 
> > 
> > I'll fix it next version.
> > 
> > > > +	u32 extra_dummy_bit;
> > > 
> > > This one looks a bit strange, can you please add a comment
> > > explaining
> > > the
> > > reason why we have this "extra dummy bit"?
> > > 
> > 
> > This one is adding for mt8186, which extra_dummy_bit is set to be
> > 1.
> > Due to the IP design, it need a extra_dummy bit when reading nor
> > flash's register(status/config...).
> > 
> > Do you think I should move the modification to another patch
> > "[PATCH v1 3/4]spi:spi-mtk-nor:add new soc mt8186 sopport" ?
> > Or I just add this comment here?
> > 
> 
> It's more appropriate to keep it in this patch and mentioning it into
> the commit description. Also, please add this comment in the code
> and,
> if possible, also explain why this IP design needs an extra dummy
> bit.
> Otherwise, if not possible, the provided explaination would also be
> fine.
> 
> Thanks,
> - Angelo
> 

OK, thanks.

BR,
Guochun

> > > > 
> > > >    	// trigger op
> > > > -	writel(prg_len * BITS_PER_BYTE, sp->base +
> > > > MTK_NOR_REG_PRG_CNT);
> > > > +	if (rx_len)
> > > > +		writel(prg_len * BITS_PER_BYTE + sp->caps-
> > > > > extra_dummy_bit,
> > > > 
> > > > +		       sp->base + MTK_NOR_REG_PRG_CNT);
> > > > +	else
> > > > +		writel(prg_len * BITS_PER_BYTE, sp->base +
> > > > MTK_NOR_REG_PRG_CNT);
> > > > +
> > > >    	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
> > > >    			       prg_len * BITS_PER_BYTE);
> > > >    	if (ret)
> > > > @@ -743,9 +754,19 @@ static const struct spi_controller_mem_ops
> > > > mtk_nor_mem_ops = {
> > > >    	.exec_op = mtk_nor_exec_op
> > > >    };
> > > >    
> > > > +const struct mtk_nor_caps mtk_nor_caps_mt8173 = {
> > > > +	.dma_bits = 32,
> > > > +	.extra_dummy_bit = 0,
> > > > +};
> > > > +
> > > > +const struct mtk_nor_caps mtk_nor_caps_mt8192 = {
> > > > +	.dma_bits = 36,
> > > > +	.extra_dummy_bit = 0,
> > > > +};
> > > > +
> > > >    static const struct of_device_id mtk_nor_match[] = {
> > > > -	{ .compatible = "mediatek,mt8192-nor", .data = (void
> > > > *)36 },
> > > > -	{ .compatible = "mediatek,mt8173-nor", .data = (void
> > > > *)32 },
> > > > +	{ .compatible = "mediatek,mt8173-nor", .data =
> > > > &mtk_nor_caps_mt8173 },
> > > > +	{ .compatible = "mediatek,mt8192-nor", .data =
> > > > &mtk_nor_caps_mt8192 },
> > > >    	{ /* sentinel */ }
> > > 
> > >    };
> > > >    MODULE_DEVICE_TABLE(of, mtk_nor_match);
> > > > @@ -754,10 +775,10 @@ static int mtk_nor_probe(struct
> > > > platform_device *pdev)
> > > >    {
> > > >    	struct spi_controller *ctlr;
> > > >    	struct mtk_nor *sp;
> > > > +	struct mtk_nor_caps *caps;
> > > >    	void __iomem *base;
> > > >    	struct clk *spi_clk, *ctlr_clk, *axi_clk;
> > > >    	int ret, irq;
> > > > -	unsigned long dma_bits;
> > > >    
> > > >    	base = devm_platform_ioremap_resource(pdev, 0);
> > > >    	if (IS_ERR(base))
> > > > @@ -775,9 +796,11 @@ static int mtk_nor_probe(struct
> > > > platform_device *pdev)
> > > >    	if (IS_ERR(axi_clk))
> > > >    		return PTR_ERR(axi_clk);
> > > 
> > >    
> > > > -	dma_bits = (unsigned
> > > > long)of_device_get_match_data(&pdev->dev);
> > > > -	if (dma_set_mask_and_coherent(&pdev->dev,
> > > > DMA_BIT_MASK(dma_bits))) {
> > > > -		dev_err(&pdev->dev, "failed to set dma
> > > > mask(%lu)\n",
> > > > dma_bits);
> > > > +	caps = (struct mtk_nor_caps
> > > > *)of_device_get_match_data(&pdev-
> > > > > dev);
> > > > 
> > > > +	if (dma_set_mask_and_coherent(&pdev->dev,
> > > > +				      DMA_BIT_MASK(caps-
> > > > >dma_bits))) {
> > > 
> > > While you're at it, can you please also make this return the
> > > right
> > > value?
> > > The function dma_set_mask_and_coherent() may return an error
> > > code, so
> > > it's
> > > worth it to just return that.
> > > 
> > > P.S.: 83 columns is ok
> > > 
> > 
> > ok, I'll fix it next version.
> > Thanks.
> > 
> > BR,
> > Guochun
> > 
> 
>
diff mbox series

Patch

diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c
index 5c93730615f8..f3bcdc1d4d8b 100644
--- a/drivers/spi/spi-mtk-nor.c
+++ b/drivers/spi/spi-mtk-nor.c
@@ -95,6 +95,11 @@ 
 
 #define CLK_TO_US(sp, clkcnt)		DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000)
 
+struct mtk_nor_caps {
+	u32 dma_bits;
+	u32 extra_dummy_bit;
+};
+
 struct mtk_nor {
 	struct spi_controller *ctlr;
 	struct device *dev;
@@ -109,6 +114,7 @@  struct mtk_nor {
 	bool has_irq;
 	bool high_dma;
 	struct completion op_done;
+	const struct mtk_nor_caps *caps;
 };
 
 static inline void mtk_nor_rmw(struct mtk_nor *sp, u32 reg, u32 set, u32 clr)
@@ -554,7 +560,12 @@  static int mtk_nor_spi_mem_prg(struct mtk_nor *sp, const struct spi_mem_op *op)
 	}
 
 	// trigger op
-	writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);
+	if (rx_len)
+		writel(prg_len * BITS_PER_BYTE + sp->caps->extra_dummy_bit,
+		       sp->base + MTK_NOR_REG_PRG_CNT);
+	else
+		writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);
+
 	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,
 			       prg_len * BITS_PER_BYTE);
 	if (ret)
@@ -743,9 +754,19 @@  static const struct spi_controller_mem_ops mtk_nor_mem_ops = {
 	.exec_op = mtk_nor_exec_op
 };
 
+const struct mtk_nor_caps mtk_nor_caps_mt8173 = {
+	.dma_bits = 32,
+	.extra_dummy_bit = 0,
+};
+
+const struct mtk_nor_caps mtk_nor_caps_mt8192 = {
+	.dma_bits = 36,
+	.extra_dummy_bit = 0,
+};
+
 static const struct of_device_id mtk_nor_match[] = {
-	{ .compatible = "mediatek,mt8192-nor", .data = (void *)36 },
-	{ .compatible = "mediatek,mt8173-nor", .data = (void *)32 },
+	{ .compatible = "mediatek,mt8173-nor", .data = &mtk_nor_caps_mt8173 },
+	{ .compatible = "mediatek,mt8192-nor", .data = &mtk_nor_caps_mt8192 },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, mtk_nor_match);
@@ -754,10 +775,10 @@  static int mtk_nor_probe(struct platform_device *pdev)
 {
 	struct spi_controller *ctlr;
 	struct mtk_nor *sp;
+	struct mtk_nor_caps *caps;
 	void __iomem *base;
 	struct clk *spi_clk, *ctlr_clk, *axi_clk;
 	int ret, irq;
-	unsigned long dma_bits;
 
 	base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(base))
@@ -775,9 +796,11 @@  static int mtk_nor_probe(struct platform_device *pdev)
 	if (IS_ERR(axi_clk))
 		return PTR_ERR(axi_clk);
 
-	dma_bits = (unsigned long)of_device_get_match_data(&pdev->dev);
-	if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits))) {
-		dev_err(&pdev->dev, "failed to set dma mask(%lu)\n", dma_bits);
+	caps = (struct mtk_nor_caps *)of_device_get_match_data(&pdev->dev);
+	if (dma_set_mask_and_coherent(&pdev->dev,
+				      DMA_BIT_MASK(caps->dma_bits))) {
+		dev_err(&pdev->dev, "failed to set dma mask(%u)\n",
+			caps->dma_bits);
 		return -EINVAL;
 	}
 
@@ -808,7 +831,8 @@  static int mtk_nor_probe(struct platform_device *pdev)
 	sp->spi_clk = spi_clk;
 	sp->ctlr_clk = ctlr_clk;
 	sp->axi_clk = axi_clk;
-	sp->high_dma = (dma_bits > 32);
+	sp->caps = caps;
+	sp->high_dma = caps->dma_bits > 32;
 	sp->buffer = dmam_alloc_coherent(&pdev->dev,
 				MTK_NOR_BOUNCE_BUF_SIZE + MTK_NOR_DMA_ALIGN,
 				&sp->buffer_dma, GFP_KERNEL);