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[0/2] net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode

Message ID 20220118053950.2605-1-yuji2.ishikawa@toshiba.co.jp (mailing list archive)
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Series net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode | expand

Message

Yuji Ishikawa Jan. 18, 2022, 5:39 a.m. UTC
Hi,

This series is a fix for RMII/MII operation mode of the dwmac-visconti driver.
It is composed of two parts:

* 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL register
* 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode.

Best regards,
  Yuji

Yuji Ishikawa (2):
  net: stmmac: dwmac-visconti: Fix bit definitions for ETHER_CLK_SEL
  net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode

 .../ethernet/stmicro/stmmac/dwmac-visconti.c  | 42 ++++++++++++-------
 1 file changed, 26 insertions(+), 16 deletions(-)

Comments

Jakub Kicinski Jan. 19, 2022, 12:50 a.m. UTC | #1
On Tue, 18 Jan 2022 14:39:48 +0900 Yuji Ishikawa wrote:
> This series is a fix for RMII/MII operation mode of the dwmac-visconti driver.
> It is composed of two parts:
> 
> * 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL register
> * 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode.

Please add appropriate Fixes tag pointing to the commits where the
buggy code was introduced, even if it's the initial commit adding 
the driver.
Yuji Ishikawa Jan. 19, 2022, 2:49 a.m. UTC | #2
Hi Jakub,

Thank you for your comment. I will add Fixed tags to commit messages.

-----Original Message-----
From: Jakub Kicinski <kuba@kernel.org> 
Sent: Wednesday, January 19, 2022 9:50 AM
To: ishikawa yuji(石川 悠司 ○RDC□AITC○EA開) <yuji2.ishikawa@toshiba.co.jp>
Cc: David S . Miller <davem@davemloft.net>; Giuseppe Cavallaro <peppe.cavallaro@st.com>; Alexandre Torgue <alexandre.torgue@st.com>; Jose Abreu <joabreu@synopsys.com>; netdev@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) <nobuhiro1.iwamatsu@toshiba.co.jp>
Subject: Re: [PATCH 0/2] net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode

> On Tue, 18 Jan 2022 14:39:48 +0900 Yuji Ishikawa wrote:
> > This series is a fix for RMII/MII operation mode of the dwmac-visconti driver.
> > It is composed of two parts:
> > 
> > * 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL 
> > register
> > * 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode.
>
> Please add appropriate Fixes tag pointing to the commits where the buggy code was introduced, even if it's the initial commit adding the driver.

Best regards,
Yuji Ishikawa