| Message ID | 20220118184448.852996-11-farosas@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/ppc: powerpc_excp improvements [40x] (3/n) | expand |
On Tue, Jan 18, 2022 at 03:44:44PM -0300, Fabiano Rosas wrote: > The current Debug exception dispatch is the BookE one, so it is > different from the 405. We effectively don't support the 405 Debug > exception. > > This patch removes the BookE code and moves the DEBUG into the "not > implemented" block. > > Note that there is in theory a functional change here since we now > abort when a Debug exception happens. However, given how it was never > implemented, I don't believe this to have ever been dispatched for the > 405. > > Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > target/ppc/excp_helper.c | 18 ++++-------------- > 1 file changed, 4 insertions(+), 14 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index d263f20002..84ec7e094a 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -539,23 +539,13 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) > case POWERPC_EXCP_DTLB: /* Data TLB error */ > case POWERPC_EXCP_ITLB: /* Instruction TLB error */ > break; > - case POWERPC_EXCP_DEBUG: /* Debug interrupt */ > - if (env->flags & POWERPC_FLAG_DE) { > - /* FIXME: choose one or the other based on CPU type */ > - srr0 = SPR_BOOKE_DSRR0; > - srr1 = SPR_BOOKE_DSRR1; > - > - env->spr[SPR_BOOKE_CSRR0] = env->nip; > - env->spr[SPR_BOOKE_CSRR1] = msr; > - > - /* DBSR already modified by caller */ > - } else { > - cpu_abort(cs, "Debug exception triggered on unsupported model\n"); > - } > - break; > case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */ > trace_ppc_excp_print("PIT"); > break; > + case POWERPC_EXCP_DEBUG: /* Debug interrupt */ > + cpu_abort(cs, "%s exception not implemented\n", > + powerpc_excp_name(excp)); > + break; > default: > cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); > break;
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index d263f20002..84ec7e094a 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -539,23 +539,13 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_DTLB: /* Data TLB error */ case POWERPC_EXCP_ITLB: /* Instruction TLB error */ break; - case POWERPC_EXCP_DEBUG: /* Debug interrupt */ - if (env->flags & POWERPC_FLAG_DE) { - /* FIXME: choose one or the other based on CPU type */ - srr0 = SPR_BOOKE_DSRR0; - srr1 = SPR_BOOKE_DSRR1; - - env->spr[SPR_BOOKE_CSRR0] = env->nip; - env->spr[SPR_BOOKE_CSRR1] = msr; - - /* DBSR already modified by caller */ - } else { - cpu_abort(cs, "Debug exception triggered on unsupported model\n"); - } - break; case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */ trace_ppc_excp_print("PIT"); break; + case POWERPC_EXCP_DEBUG: /* Debug interrupt */ + cpu_abort(cs, "%s exception not implemented\n", + powerpc_excp_name(excp)); + break; default: cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp); break;
The current Debug exception dispatch is the BookE one, so it is different from the 405. We effectively don't support the 405 Debug exception. This patch removes the BookE code and moves the DEBUG into the "not implemented" block. Note that there is in theory a functional change here since we now abort when a Debug exception happens. However, given how it was never implemented, I don't believe this to have ever been dispatched for the 405. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> --- target/ppc/excp_helper.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-)