diff mbox series

[v2,1/2] ARM: dts: imx7s: Define operating points table for cpufreq

Message ID 20220124082803.94286-2-francesco.dolcini@toradex.com (mailing list archive)
State New, archived
Headers show
Series Enable i.MX7 SOLO temperature sensor | expand

Commit Message

Francesco Dolcini Jan. 24, 2022, 8:28 a.m. UTC
From: Denys Drozdov <denys.drozdov@toradex.com>

Processor operating points for imx7s.dtsi should be properly defined to
perform correct imx-cpufreq-dt probe and registration and provide an
access to the temperature sensors using the i.MX thermal driver.

Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---

v2: no changes

---
 arch/arm/boot/dts/imx7s.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Fabio Estevam Feb. 2, 2022, 6:15 p.m. UTC | #1
Hi Francesco,

On Mon, Jan 24, 2022 at 5:28 AM Francesco Dolcini
<francesco.dolcini@toradex.com> wrote:
>
> From: Denys Drozdov <denys.drozdov@toradex.com>
>
> Processor operating points for imx7s.dtsi should be properly defined to
> perform correct imx-cpufreq-dt probe and registration and provide an
> access to the temperature sensors using the i.MX thermal driver.
>
> Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>

Reviewed-by: Fabio Estevam <festevam@gmail.com>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 52a9aeecdbb2..5af6d58666f4 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -76,6 +76,22 @@  cpu0: cpu@0 {
 			clock-latency = <61036>; /* two CLK32 periods */
 			clocks = <&clks IMX7D_CLK_ARM>;
 			cpu-idle-states = <&cpu_sleep_wait>;
+			operating-points-v2 = <&cpu0_opp_table>;
+			#cooling-cells = <2>;
+			nvmem-cells = <&fuse_grade>;
+			nvmem-cell-names = "speed_grade";
+		};
+	};
+
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-792000000 {
+			opp-hz = /bits/ 64 <792000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <150000>;
+			opp-supported-hw = <0xf>, <0xf>;
 		};
 	};