| Message ID | 20220214171157.20371-1-joakim.tjernlund@infinera.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Correct wrong label in macro __init_el2_gicv3 | expand |
[Adding Ccs] On Mon, Feb 14, 2022 at 06:11:57PM +0100, Joakim Tjernlund wrote: > If GICv3 init fails, CPU branched to the wrong label causing > a crash much later. How about: | In commit: | | 114945d84a30a5fe ("arm64: Fix labels in el2_setup macros") | | We renamed a label from '1' to '.Lskip_gicv3_\@', but failed to update | a branch to it, which now targets a later label also called '1'. | | The branch is taken rarely, when GICv3 is present but SRE is disabled | at EL3, causing a boot-time crash. | | Update the caller to the new label name. ... since that makes it clear that this is the right fix. > Fixes: 114945d84a30a5fe ("arm64: Fix labels in el2_setup macros") > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> With the wording above: Reviewed-by: Mark Rutland <mark.rutland@arm.com> Thanks, Mark. > --- > arch/arm64/include/asm/el2_setup.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index 3198acb2aad8..7f3c87f7a0ce 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -106,7 +106,7 @@ > msr_s SYS_ICC_SRE_EL2, x0 > isb // Make sure SRE is now set > mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back, > - tbz x0, #0, 1f // and check that it sticks > + tbz x0, #0, .Lskip_gicv3_\@ // and check that it sticks > msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults > .Lskip_gicv3_\@: > .endm > -- > 2.32.0 >
[+ Catalin, Will] On Mon, 14 Feb 2022 17:11:57 +0000, Joakim Tjernlund <joakim.tjernlund@infinera.com> wrote: > > If GICv3 init fails, CPU branched to the wrong label causing > a crash much later. > > Fixes: 114945d84a30a5fe ("arm64: Fix labels in el2_setup macros") > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> This deserves a Cc: stable@vger.kernel.org > --- > arch/arm64/include/asm/el2_setup.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index 3198acb2aad8..7f3c87f7a0ce 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -106,7 +106,7 @@ > msr_s SYS_ICC_SRE_EL2, x0 > isb // Make sure SRE is now set > mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back, > - tbz x0, #0, 1f // and check that it sticks > + tbz x0, #0, .Lskip_gicv3_\@ // and check that it sticks > msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults > .Lskip_gicv3_\@: > .endm Nice catch! Reviewed-by: Marc Zyngier <maz@kernel.org> Thanks, M.
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index 3198acb2aad8..7f3c87f7a0ce 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -106,7 +106,7 @@ msr_s SYS_ICC_SRE_EL2, x0 isb // Make sure SRE is now set mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back, - tbz x0, #0, 1f // and check that it sticks + tbz x0, #0, .Lskip_gicv3_\@ // and check that it sticks msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults .Lskip_gicv3_\@: .endm
If GICv3 init fails, CPU branched to the wrong label causing a crash much later. Fixes: 114945d84a30a5fe ("arm64: Fix labels in el2_setup macros") Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> --- arch/arm64/include/asm/el2_setup.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)