diff mbox series

[v6,3/3] arm64: dts: mt8183: add jpeg enc node for mt8183

Message ID 20211206130425.184420-3-hsinyi@chromium.org (mailing list archive)
State New, archived
Headers show
Series [v6,1/3] dt-bindings: mediatek: convert mtk jpeg decoder/encoder to yaml | expand

Commit Message

Hsin-Yi Wang Dec. 6, 2021, 1:04 p.m. UTC 
From: Maoguang Meng <maoguang.meng@mediatek.com>

Add jpeg encoder device tree node.

Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
v5->v6: no change, rebase to latest linux-next
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

AngeloGioacchino Del Regno Feb. 17, 2022, 9:41 a.m. UTC | #1 
Il 06/12/21 14:04, Hsin-Yi Wang ha scritto:
> From: Maoguang Meng <maoguang.meng@mediatek.com>
> 
> Add jpeg encoder device tree node.
> 
> Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com>
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Matthias Brugger March 1, 2022, 7:30 a.m. UTC | #2 
On 17/02/2022 10:41, AngeloGioacchino Del Regno wrote:
> Il 06/12/21 14:04, Hsin-Yi Wang ha scritto:
>> From: Maoguang Meng <maoguang.meng@mediatek.com>
>>
>> Add jpeg encoder device tree node.
>>
>> Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com>
>> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> 
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> 

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index ba4584faca5aea..ac6b0c12d3b339 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1530,6 +1530,18 @@  larb4: larb@17010000 {
 			power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
 		};
 
+		venc_jpg: venc_jpg@17030000 {
+			compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";
+			reg = <0 0x17030000 0 0x1000>;
+			interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;
+			mediatek,larb = <&larb4>;
+			iommus = <&iommu M4U_PORT_JPGENC_RDMA>,
+				 <&iommu M4U_PORT_JPGENC_BSDMA>;
+			power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
+			clocks = <&vencsys CLK_VENC_JPGENC>;
+			clock-names = "jpgenc";
+		};
+
 		ipu_conn: syscon@19000000 {
 			compatible = "mediatek,mt8183-ipu_conn", "syscon";
 			reg = <0 0x19000000 0 0x1000>;