| Message ID | 20220218145437.18563-6-granquet@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: Add mt8195 DisplayPort driver | expand |
Hi, Guillaume: Guillaume Ranquet <granquet@baylibre.com> 於 2022年2月18日 週五 下午10:56寫道： > > Add flexibility by moving the dpi limits to the board config This patch looks good to me. But I would like to know what's this limit and why it vary in different SoC. If possible, would you please provide more description for this? Regards, Chun-Kuang. > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 25 ++++++++++++++++--------- > 1 file changed, 16 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 4554e2de14309..4746eb3425674 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -125,6 +125,7 @@ struct mtk_dpi_conf { > bool edge_sel_en; > const u32 *output_fmts; > u32 num_output_fmts; > + const struct mtk_dpi_yc_limit *limit; > }; > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) > @@ -235,9 +236,10 @@ static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height) > mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); > } > > -static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi, > - struct mtk_dpi_yc_limit *limit) > +static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) > { > + const struct mtk_dpi_yc_limit *limit = dpi->conf->limit; > + > mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT, > Y_LIMINT_BOT_MASK); > mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP, > @@ -449,7 +451,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) > static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > struct drm_display_mode *mode) > { > - struct mtk_dpi_yc_limit limit; > struct mtk_dpi_polarities dpi_pol; > struct mtk_dpi_sync_param hsync; > struct mtk_dpi_sync_param vsync_lodd = { 0 }; > @@ -484,11 +485,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", > pll_rate, vm.pixelclock); > > - limit.c_bottom = 0x0010; > - limit.c_top = 0x0FE0; > - limit.y_bottom = 0x0010; > - limit.y_top = 0x0FE0; > - > dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; > dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; > dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? > @@ -536,7 +532,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > else > mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive); > > - mtk_dpi_config_channel_limit(dpi, &limit); > + mtk_dpi_config_channel_limit(dpi); > mtk_dpi_config_bit_num(dpi, dpi->bit_num); > mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); > mtk_dpi_config_yc_map(dpi, dpi->yc_map); > @@ -790,12 +786,20 @@ static const u32 mt8183_output_fmts[] = { > MEDIA_BUS_FMT_RGB888_2X12_BE, > }; > > +static const struct mtk_dpi_yc_limit mtk_dpi_limit = { > + .c_bottom = 0x0010, > + .c_top = 0x0FE0, > + .y_bottom = 0x0010, > + .y_top = 0x0FE0, > +}; > + > static const struct mtk_dpi_conf mt8173_conf = { > .cal_factor = mt8173_calculate_factor, > .reg_h_fre_con = 0xe0, > .max_clock_khz = 300000, > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > + .limit = &mtk_dpi_limit, > }; > > static const struct mtk_dpi_conf mt2701_conf = { > @@ -805,6 +809,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .max_clock_khz = 150000, > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > + .limit = &mtk_dpi_limit, > }; > > static const struct mtk_dpi_conf mt8183_conf = { > @@ -813,6 +818,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .max_clock_khz = 100000, > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > + .limit = &mtk_dpi_limit, > }; > > static const struct mtk_dpi_conf mt8192_conf = { > @@ -821,6 +827,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .max_clock_khz = 150000, > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > + .limit = &mtk_dpi_limit, > }; > > static int mtk_dpi_probe(struct platform_device *pdev) > -- > 2.34.1 >
Il 18/02/22 15:54, Guillaume Ranquet ha scritto: > Add flexibility by moving the dpi limits to the board config s/board/SoC/g After the change, Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Quoting Chun-Kuang Hu (2022-02-21 02:46:15) > Hi, Guillaume: > > Guillaume Ranquet <granquet@baylibre.com> 於 2022年2月18日 週五 下午10:56寫道： > > > > Add flexibility by moving the dpi limits to the board config > > This patch looks good to me. But I would like to know what's this > limit and why it vary in different SoC. If possible, would you please > provide more description for this? > > Regards, > Chun-Kuang. > Hi Chun-Kuang, You are right, the commit message is rather vague and deserves more details. I'll have to dig into the documentations I have access to and ask maybe ask the engineers at mediatek for a detailed description. Thx, Guillaume. > > > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 25 ++++++++++++++++--------- > > 1 file changed, 16 insertions(+), 9 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 4554e2de14309..4746eb3425674 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -125,6 +125,7 @@ struct mtk_dpi_conf { > > bool edge_sel_en; > > const u32 *output_fmts; > > u32 num_output_fmts; > > + const struct mtk_dpi_yc_limit *limit; > > }; > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) > > @@ -235,9 +236,10 @@ static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height) > > mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); > > } > > > > -static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi, > > - struct mtk_dpi_yc_limit *limit) > > +static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) > > { > > + const struct mtk_dpi_yc_limit *limit = dpi->conf->limit; > > + > > mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT, > > Y_LIMINT_BOT_MASK); > > mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP, > > @@ -449,7 +451,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) > > static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > > struct drm_display_mode *mode) > > { > > - struct mtk_dpi_yc_limit limit; > > struct mtk_dpi_polarities dpi_pol; > > struct mtk_dpi_sync_param hsync; > > struct mtk_dpi_sync_param vsync_lodd = { 0 }; > > @@ -484,11 +485,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > > dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", > > pll_rate, vm.pixelclock); > > > > - limit.c_bottom = 0x0010; > > - limit.c_top = 0x0FE0; > > - limit.y_bottom = 0x0010; > > - limit.y_top = 0x0FE0; > > - > > dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; > > dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; > > dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? > > @@ -536,7 +532,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > > else > > mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive); > > > > - mtk_dpi_config_channel_limit(dpi, &limit); > > + mtk_dpi_config_channel_limit(dpi); > > mtk_dpi_config_bit_num(dpi, dpi->bit_num); > > mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); > > mtk_dpi_config_yc_map(dpi, dpi->yc_map); > > @@ -790,12 +786,20 @@ static const u32 mt8183_output_fmts[] = { > > MEDIA_BUS_FMT_RGB888_2X12_BE, > > }; > > > > +static const struct mtk_dpi_yc_limit mtk_dpi_limit = { > > + .c_bottom = 0x0010, > > + .c_top = 0x0FE0, > > + .y_bottom = 0x0010, > > + .y_top = 0x0FE0, > > +}; > > + > > static const struct mtk_dpi_conf mt8173_conf = { > > .cal_factor = mt8173_calculate_factor, > > .reg_h_fre_con = 0xe0, > > .max_clock_khz = 300000, > > .output_fmts = mt8173_output_fmts, > > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > > + .limit = &mtk_dpi_limit, > > }; > > > > static const struct mtk_dpi_conf mt2701_conf = { > > @@ -805,6 +809,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > > .max_clock_khz = 150000, > > .output_fmts = mt8173_output_fmts, > > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > > + .limit = &mtk_dpi_limit, > > }; > > > > static const struct mtk_dpi_conf mt8183_conf = { > > @@ -813,6 +818,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > > .max_clock_khz = 100000, > > .output_fmts = mt8183_output_fmts, > > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > > + .limit = &mtk_dpi_limit, > > }; > > > > static const struct mtk_dpi_conf mt8192_conf = { > > @@ -821,6 +827,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > > .max_clock_khz = 150000, > > .output_fmts = mt8173_output_fmts, > > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > > + .limit = &mtk_dpi_limit, > > }; > > > > static int mtk_dpi_probe(struct platform_device *pdev) > > -- > > 2.34.1 > >
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 4554e2de14309..4746eb3425674 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -125,6 +125,7 @@ struct mtk_dpi_conf { bool edge_sel_en; const u32 *output_fmts; u32 num_output_fmts; + const struct mtk_dpi_yc_limit *limit; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -235,9 +236,10 @@ static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height) mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK); } -static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi, - struct mtk_dpi_yc_limit *limit) +static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi) { + const struct mtk_dpi_yc_limit *limit = dpi->conf->limit; + mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT, Y_LIMINT_BOT_MASK); mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP, @@ -449,7 +451,6 @@ static int mtk_dpi_power_on(struct mtk_dpi *dpi) static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, struct drm_display_mode *mode) { - struct mtk_dpi_yc_limit limit; struct mtk_dpi_polarities dpi_pol; struct mtk_dpi_sync_param hsync; struct mtk_dpi_sync_param vsync_lodd = { 0 }; @@ -484,11 +485,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", pll_rate, vm.pixelclock); - limit.c_bottom = 0x0010; - limit.c_top = 0x0FE0; - limit.y_bottom = 0x0010; - limit.y_top = 0x0FE0; - dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? @@ -536,7 +532,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, else mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive); - mtk_dpi_config_channel_limit(dpi, &limit); + mtk_dpi_config_channel_limit(dpi); mtk_dpi_config_bit_num(dpi, dpi->bit_num); mtk_dpi_config_channel_swap(dpi, dpi->channel_swap); mtk_dpi_config_yc_map(dpi, dpi->yc_map); @@ -790,12 +786,20 @@ static const u32 mt8183_output_fmts[] = { MEDIA_BUS_FMT_RGB888_2X12_BE, }; +static const struct mtk_dpi_yc_limit mtk_dpi_limit = { + .c_bottom = 0x0010, + .c_top = 0x0FE0, + .y_bottom = 0x0010, + .y_top = 0x0FE0, +}; + static const struct mtk_dpi_conf mt8173_conf = { .cal_factor = mt8173_calculate_factor, .reg_h_fre_con = 0xe0, .max_clock_khz = 300000, .output_fmts = mt8173_output_fmts, .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), + .limit = &mtk_dpi_limit, }; static const struct mtk_dpi_conf mt2701_conf = { @@ -805,6 +809,7 @@ static const struct mtk_dpi_conf mt2701_conf = { .max_clock_khz = 150000, .output_fmts = mt8173_output_fmts, .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), + .limit = &mtk_dpi_limit, }; static const struct mtk_dpi_conf mt8183_conf = { @@ -813,6 +818,7 @@ static const struct mtk_dpi_conf mt8183_conf = { .max_clock_khz = 100000, .output_fmts = mt8183_output_fmts, .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), + .limit = &mtk_dpi_limit, }; static const struct mtk_dpi_conf mt8192_conf = { @@ -821,6 +827,7 @@ static const struct mtk_dpi_conf mt8192_conf = { .max_clock_khz = 150000, .output_fmts = mt8173_output_fmts, .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), + .limit = &mtk_dpi_limit, }; static int mtk_dpi_probe(struct platform_device *pdev)
Add flexibility by moving the dpi limits to the board config Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> --- drivers/gpu/drm/mediatek/mtk_dpi.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-)