| Message ID | 20220206091835.1244296-2-atishp@rivosinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Privilege version update | expand |
On Sun, Feb 6, 2022 at 7:26 PM Atish Patra <atishp@rivosinc.com> wrote: > > Currently, the privileged specification version are defined in > a complex manner for no benefit. > > Simplify it by changing it to a simple enum based on. > > Suggested-by: Richard Henderson <richard.henderson@linaro.org> > Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.h | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index 9d24d678e98a..e5ff4c134c86 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -82,8 +82,11 @@ enum { > RISCV_FEATURE_AIA > }; > > -#define PRIV_VERSION_1_10_0 0x00011000 > -#define PRIV_VERSION_1_11_0 0x00011100 > +/* Privileged specification version */ > +enum { > + PRIV_VERSION_1_10_0 = 0, > + PRIV_VERSION_1_11_0, > +}; > > #define VEXT_VERSION_1_00_0 0x00010000 > > -- > 2.30.2 > >
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 9d24d678e98a..e5ff4c134c86 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -82,8 +82,11 @@ enum { RISCV_FEATURE_AIA }; -#define PRIV_VERSION_1_10_0 0x00011000 -#define PRIV_VERSION_1_11_0 0x00011100 +/* Privileged specification version */ +enum { + PRIV_VERSION_1_10_0 = 0, + PRIV_VERSION_1_11_0, +}; #define VEXT_VERSION_1_00_0 0x00010000
Currently, the privileged specification version are defined in a complex manner for no benefit. Simplify it by changing it to a simple enum based on. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> --- target/riscv/cpu.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)