| Message ID | 1645505785-2271-4-git-send-email-quic_rohiagar@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Add APCS support for SDX65 | expand |
Quoting Rohit Agarwal (2022-02-21 20:56:23) > On SDX65 there is a separate A7 PLL which is used to provide high > frequency clock to the Cortex A7 CPU via a MUX. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- Reviewed-by: Stephen Boyd <sboyd@kernel.org>
On Tue, Feb 22, 2022 at 10:26:23AM +0530, Rohit Agarwal wrote: > On SDX65 there is a separate A7 PLL which is used to provide high > frequency clock to the Cortex A7 CPU via a MUX. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Thanks, Mani > --- > arch/arm/boot/dts/qcom-sdx65.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi > index 653df15..ec80266 100644 > --- a/arch/arm/boot/dts/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi > @@ -125,6 +125,14 @@ > <0x17802000 0x1000>; > }; > > + a7pll: clock@17808000 { > + compatible = "qcom,sdx55-a7pll"; > + reg = <0x17808000 0x1000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "bi_tcxo"; > + #clock-cells = <0>; > + }; > + > timer@17820000 { > #address-cells = <1>; > #size-cells = <1>; > -- > 2.7.4 >
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 653df15..ec80266 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -125,6 +125,14 @@ <0x17802000 0x1000>; }; + a7pll: clock@17808000 { + compatible = "qcom,sdx55-a7pll"; + reg = <0x17808000 0x1000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <0>; + }; + timer@17820000 { #address-cells = <1>; #size-cells = <1>;
On SDX65 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> --- arch/arm/boot/dts/qcom-sdx65.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)