Message ID | 20220225075150.2729401-18-s.hauer@pengutronix.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/rockchip: RK356x VOP2 support | expand |
On Fri, Feb 25, 2022 at 08:51:43AM +0100, Sascha Hauer wrote: > The VOP2 is the display output controller on the RK3568. Add the node > for it to the dtsi file along with the required display-subsystem node > and the iommu node. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > Acked-by: Rob Herring <robh@kernel.org> > --- > > Notes: > Changes since v4: > - Add Robs Ack > > Changes since v3: > - Bring back gamma_lut regs > - Drop redundant _vop suffix from clock names > > arch/arm64/boot/dts/rockchip/rk3566.dtsi | 4 ++ > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++ > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 51 ++++++++++++++++++++++++ > include/dt-bindings/soc/rockchip,vop2.h | 14 +++++++ > 4 files changed, 73 insertions(+) > create mode 100644 include/dt-bindings/soc/rockchip,vop2.h > > diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi > index 3839eef5e4f76..595fa2562cb8e 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi > @@ -18,3 +18,7 @@ power-domain@RK3568_PD_PIPE { > #power-domain-cells = <0>; > }; > }; > + > +&vop { > + compatible = "rockchip,rk3566-vop"; > +}; > diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > index 2fd313a295f8a..1e55efb6fcfde 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > @@ -95,3 +95,7 @@ power-domain@RK3568_PD_PIPE { > #power-domain-cells = <0>; > }; > }; > + > +&vop { > + compatible = "rockchip,rk3568-vop"; > +}; > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index a68033a239750..19d8e67c4698b 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -129,6 +129,11 @@ opp-1800000000 { > }; > }; > > + display_subsystem: display-subsystem { > + compatible = "rockchip,display-subsystem"; > + ports = <&vop_out>; > + }; > + > firmware { > scmi: scmi { > compatible = "arm,scmi-smc"; > @@ -451,6 +456,52 @@ gmac1_mtl_tx_setup: tx-queues-config { > }; > }; > > + vop: vop@fe040000 { > + reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; > + reg-names = "regs", "gamma_lut"; > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, > + <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; > + clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; > + iommus = <&vop_mmu>; > + power-domains = <&power RK3568_PD_VO>; > + rockchip,grf = <&grf>; > + status = "disabled"; > + > + vop_out: ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + vp0: port@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + vp1: port@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + vp2: port@2 { > + reg = <2>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + }; > + > + vop_mmu: iommu@fe043e00 { > + compatible = "rockchip,rk3568-iommu"; > + reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > + #iommu-cells = <0>; > + status = "disabled"; > + }; > + > qos_gpu: qos@fe128000 { > compatible = "rockchip,rk3568-qos", "syscon"; > reg = <0x0 0xfe128000 0x0 0x20>; > diff --git a/include/dt-bindings/soc/rockchip,vop2.h b/include/dt-bindings/soc/rockchip,vop2.h > new file mode 100644 > index 0000000000000..6e66a802b96a5 > --- /dev/null > +++ b/include/dt-bindings/soc/rockchip,vop2.h > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > + > +#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H > +#define __DT_BINDINGS_ROCKCHIP_VOP2_H > + > +#define ROCKCHIP_VOP2_EP_RGB0 1 > +#define ROCKCHIP_VOP2_EP_HDMI0 2 > +#define ROCKCHIP_VOP2_EP_EDP0 3 > +#define ROCKCHIP_VOP2_EP_MIPI0 4 > +#define ROCKCHIP_VOP2_EP_LVDS0 5 > +#define ROCKCHIP_VOP2_EP_MIPI1 6 > +#define ROCKCHIP_VOP2_EP_LVDS1 7 One thing I missed to log in the changelog: These defines now have a ROCKCHIP_ prefix rather than a RK3568_ prefix so that they can be reused by future SoCs. Also I start counting from one now so that a zero initialized variable becomes an invalid value. Sascha
diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi index 3839eef5e4f76..595fa2562cb8e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi @@ -18,3 +18,7 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + +&vop { + compatible = "rockchip,rk3566-vop"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 2fd313a295f8a..1e55efb6fcfde 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -95,3 +95,7 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + +&vop { + compatible = "rockchip,rk3568-vop"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index a68033a239750..19d8e67c4698b 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -129,6 +129,11 @@ opp-1800000000 { }; }; + display_subsystem: display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + }; + firmware { scmi: scmi { compatible = "arm,scmi-smc"; @@ -451,6 +456,52 @@ gmac1_mtl_tx_setup: tx-queues-config { }; }; + vop: vop@fe040000 { + reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; + reg-names = "regs", "gamma_lut"; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, + <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; + clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; + iommus = <&vop_mmu>; + power-domains = <&power RK3568_PD_VO>; + rockchip,grf = <&grf>; + status = "disabled"; + + vop_out: ports { + #address-cells = <1>; + #size-cells = <0>; + + vp0: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + vp1: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + vp2: port@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + vop_mmu: iommu@fe043e00 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + status = "disabled"; + }; + qos_gpu: qos@fe128000 { compatible = "rockchip,rk3568-qos", "syscon"; reg = <0x0 0xfe128000 0x0 0x20>; diff --git a/include/dt-bindings/soc/rockchip,vop2.h b/include/dt-bindings/soc/rockchip,vop2.h new file mode 100644 index 0000000000000..6e66a802b96a5 --- /dev/null +++ b/include/dt-bindings/soc/rockchip,vop2.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ + +#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H +#define __DT_BINDINGS_ROCKCHIP_VOP2_H + +#define ROCKCHIP_VOP2_EP_RGB0 1 +#define ROCKCHIP_VOP2_EP_HDMI0 2 +#define ROCKCHIP_VOP2_EP_EDP0 3 +#define ROCKCHIP_VOP2_EP_MIPI0 4 +#define ROCKCHIP_VOP2_EP_LVDS0 5 +#define ROCKCHIP_VOP2_EP_MIPI1 6 +#define ROCKCHIP_VOP2_EP_LVDS1 7 + +#endif /* __DT_BINDINGS_ROCKCHIP_VOP2_H */