diff mbox series

[v6,09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension

Message ID 20220227142553.25815-10-liweiwei@iscas.ac.cn (mailing list archive)
State New, archived
Headers show
Series support subsets of scalar crypto extension | expand

Commit Message

Weiwei Li Feb. 27, 2022, 2:25 p.m. UTC 
- add sha512sum0r, sha512sig0l, sha512sum1r, sha512sig1l, sha512sig0h and sha512sig1h instructions

Co-authored-by: Zewen Ye <lustrew@foxmail.com>
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
 target/riscv/crypto_helper.c            | 57 ++++++++++++++++
 target/riscv/helper.h                   |  7 ++
 target/riscv/insn32.decode              |  6 ++
 target/riscv/insn_trans/trans_rvk.c.inc | 90 +++++++++++++++++++++++++
 4 files changed, 160 insertions(+)

Comments

Richard Henderson Feb. 27, 2022, 7:36 p.m. UTC | #1 
On 2/27/22 04:25, Weiwei Li wrote:
>   - add sha512sum0r, sha512sig0l, sha512sum1r, sha512sig1l, sha512sig0h and sha512sig1h instructions
> 
> Co-authored-by: Zewen Ye <lustrew@foxmail.com>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> ---
>   target/riscv/crypto_helper.c            | 57 ++++++++++++++++
>   target/riscv/helper.h                   |  7 ++
>   target/riscv/insn32.decode              |  6 ++
>   target/riscv/insn_trans/trans_rvk.c.inc | 90 +++++++++++++++++++++++++
>   4 files changed, 160 insertions(+)
> 
> diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c
> index f5ffc262f2..6cd2a92b86 100644
> --- a/target/riscv/crypto_helper.c
> +++ b/target/riscv/crypto_helper.c
> @@ -303,4 +303,61 @@ target_ulong HELPER(sha256sum1)(target_ulong rs1)
>       return sext_xlen(ROR32(a, 6) ^ ROR32(a, 11) ^ ROR32(a, 25));
>   }
>   #undef ROR32
> +
> +#define zext32(x) ((uint64_t)(uint32_t)(x))
> +
> +target_ulong HELPER(sha512sum0r)(target_ulong rs1, target_ulong rs2)
> +{
> +    uint64_t result = (zext32(rs1) << 25) ^ (zext32(rs1) << 30) ^
> +                      (zext32(rs1) >> 28) ^ (zext32(rs2) >> 7) ^
> +                      (zext32(rs2) >> 2) ^ (zext32(rs2) << 4);
> +
> +    return sext_xlen(result);
> +}

I'm a little confused as to why you're extending back to uint64_t?  Especially since the 
top 32 are discarded.

Also, I think sext_xlen is a bad name -- sext32_xlen would be better.  It confused me here 
for a bit, and I went off on a bit of an irrelevant tangent.

These could also be implemented inline.  I count 12 instructions.  The overhead of a 
function call is about 7.

> +DEF_HELPER_2(sha512sum0r, tl, tl, tl)
> +DEF_HELPER_2(sha512sum1r, tl, tl, tl)
> +DEF_HELPER_2(sha512sig0l, tl, tl, tl)
> +DEF_HELPER_2(sha512sig0h, tl, tl, tl)
> +DEF_HELPER_2(sha512sig1l, tl, tl, tl)
> +DEF_HELPER_2(sha512sig1h, tl, tl, tl)

DEF_HELPER_FLAGS.

> +static bool trans_sha512sum0r(DisasContext *ctx, arg_sha512sum0r *a)
> +{
> +    REQUIRE_32BIT(ctx);
> +    REQUIRE_ZKNH(ctx);
> +
> +    TCGv dest = dest_gpr(ctx, a->rd);
> +    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
> +    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
> +
> +    gen_helper_sha512sum0r(dest, src1, src2);
> +    gen_set_gpr(ctx, a->rd, dest);
> +
> +    return true;
> +}

gen_arith.


r~
Weiwei Li Feb. 28, 2022, 3:17 a.m. UTC | #2 
在 2022/2/28 上午3:36, Richard Henderson 写道:
> On 2/27/22 04:25, Weiwei Li wrote:
>>   - add sha512sum0r, sha512sig0l, sha512sum1r, sha512sig1l, 
>> sha512sig0h and sha512sig1h instructions
>>
>> Co-authored-by: Zewen Ye <lustrew@foxmail.com>
>> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
>> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
>> ---
>>   target/riscv/crypto_helper.c            | 57 ++++++++++++++++
>>   target/riscv/helper.h                   |  7 ++
>>   target/riscv/insn32.decode              |  6 ++
>>   target/riscv/insn_trans/trans_rvk.c.inc | 90 +++++++++++++++++++++++++
>>   4 files changed, 160 insertions(+)
>>
>> diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c
>> index f5ffc262f2..6cd2a92b86 100644
>> --- a/target/riscv/crypto_helper.c
>> +++ b/target/riscv/crypto_helper.c
>> @@ -303,4 +303,61 @@ target_ulong HELPER(sha256sum1)(target_ulong rs1)
>>       return sext_xlen(ROR32(a, 6) ^ ROR32(a, 11) ^ ROR32(a, 25));
>>   }
>>   #undef ROR32
>> +
>> +#define zext32(x) ((uint64_t)(uint32_t)(x))
>> +
>> +target_ulong HELPER(sha512sum0r)(target_ulong rs1, target_ulong rs2)
>> +{
>> +    uint64_t result = (zext32(rs1) << 25) ^ (zext32(rs1) << 30) ^
>> +                      (zext32(rs1) >> 28) ^ (zext32(rs2) >> 7) ^
>> +                      (zext32(rs2) >> 2) ^ (zext32(rs2) << 4);
>> +
>> +    return sext_xlen(result);
>> +}
>
> I'm a little confused as to why you're extending back to uint64_t?  
> Especially since the top 32 are discarded.
>
> Also, I think sext_xlen is a bad name -- sext32_xlen would be better.  
> It confused me here for a bit, and I went off on a bit of an 
> irrelevant tangent.
>
> These could also be implemented inline.  I count 12 instructions. The 
> overhead of a function call is about 7.
Yeah. It's not necessary to extend to uint64_t.  I'll try to change them 
to inline later.
>
>> +DEF_HELPER_2(sha512sum0r, tl, tl, tl)
>> +DEF_HELPER_2(sha512sum1r, tl, tl, tl)
>> +DEF_HELPER_2(sha512sig0l, tl, tl, tl)
>> +DEF_HELPER_2(sha512sig0h, tl, tl, tl)
>> +DEF_HELPER_2(sha512sig1l, tl, tl, tl)
>> +DEF_HELPER_2(sha512sig1h, tl, tl, tl)
>
> DEF_HELPER_FLAGS.
>
>> +static bool trans_sha512sum0r(DisasContext *ctx, arg_sha512sum0r *a)
>> +{
>> +    REQUIRE_32BIT(ctx);
>> +    REQUIRE_ZKNH(ctx);
>> +
>> +    TCGv dest = dest_gpr(ctx, a->rd);
>> +    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
>> +    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
>> +
>> +    gen_helper_sha512sum0r(dest, src1, src2);
>> +    gen_set_gpr(ctx, a->rd, dest);
>> +
>> +    return true;
>> +}
>
> gen_arith.
>
OK. I'll fix them.

Regards,

Weiwei Li

>
> r~
diff mbox series

Patch

diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c
index f5ffc262f2..6cd2a92b86 100644
--- a/target/riscv/crypto_helper.c
+++ b/target/riscv/crypto_helper.c
@@ -303,4 +303,61 @@  target_ulong HELPER(sha256sum1)(target_ulong rs1)
     return sext_xlen(ROR32(a, 6) ^ ROR32(a, 11) ^ ROR32(a, 25));
 }
 #undef ROR32
+
+#define zext32(x) ((uint64_t)(uint32_t)(x))
+
+target_ulong HELPER(sha512sum0r)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) << 25) ^ (zext32(rs1) << 30) ^
+                      (zext32(rs1) >> 28) ^ (zext32(rs2) >> 7) ^
+                      (zext32(rs2) >> 2) ^ (zext32(rs2) << 4);
+
+    return sext_xlen(result);
+}
+
+target_ulong HELPER(sha512sum1r)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) << 23) ^ (zext32(rs1) >> 14) ^
+                      (zext32(rs1) >> 18) ^ (zext32(rs2) >> 9) ^
+                      (zext32(rs2) << 18) ^ (zext32(rs2) << 14);
+
+    return sext_xlen(result);
+}
+
+target_ulong HELPER(sha512sig0l)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) >> 1) ^ (zext32(rs1) >> 7) ^
+                      (zext32(rs1) >> 8) ^ (zext32(rs2) << 31) ^
+                      (zext32(rs2) << 25) ^ (zext32(rs2) << 24);
+
+    return sext_xlen(result);
+}
+
+target_ulong HELPER(sha512sig0h)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) >> 1) ^ (zext32(rs1) >> 7) ^
+                      (zext32(rs1) >> 8) ^ (zext32(rs2) << 31) ^
+                      (zext32(rs2) << 24);
+
+    return sext_xlen(result);
+}
+
+target_ulong HELPER(sha512sig1l)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) << 3) ^ (zext32(rs1) >> 6) ^
+                      (zext32(rs1) >> 19) ^ (zext32(rs2) >> 29) ^
+                      (zext32(rs2) << 26) ^ (zext32(rs2) << 13);
+
+    return sext_xlen(result);
+}
+
+target_ulong HELPER(sha512sig1h)(target_ulong rs1, target_ulong rs2)
+{
+    uint64_t result = (zext32(rs1) << 3) ^ (zext32(rs1) >> 6) ^
+                      (zext32(rs1) >> 19) ^ (zext32(rs2) >> 29) ^
+                      (zext32(rs2) << 13);
+
+    return sext_xlen(result);
+}
+#undef zext32
 #undef sext_xlen
diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 898d093ae9..207d298fde 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -1134,3 +1134,10 @@  DEF_HELPER_1(sha256sig0, tl, tl)
 DEF_HELPER_1(sha256sig1, tl, tl)
 DEF_HELPER_1(sha256sum0, tl, tl)
 DEF_HELPER_1(sha256sum1, tl, tl)
+
+DEF_HELPER_2(sha512sum0r, tl, tl, tl)
+DEF_HELPER_2(sha512sum1r, tl, tl, tl)
+DEF_HELPER_2(sha512sig0l, tl, tl, tl)
+DEF_HELPER_2(sha512sig0h, tl, tl, tl)
+DEF_HELPER_2(sha512sig1l, tl, tl, tl)
+DEF_HELPER_2(sha512sig1h, tl, tl, tl)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index f86745edcb..6064dadef8 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -859,3 +859,9 @@  sha256sig0  00 01000 00010 ..... 001 ..... 0010011 @r2
 sha256sig1  00 01000 00011 ..... 001 ..... 0010011 @r2
 sha256sum0  00 01000 00000 ..... 001 ..... 0010011 @r2
 sha256sum1  00 01000 00001 ..... 001 ..... 0010011 @r2
+sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r
+sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r
+sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r
+sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r
+sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r
+sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r
diff --git a/target/riscv/insn_trans/trans_rvk.c.inc b/target/riscv/insn_trans/trans_rvk.c.inc
index ce29eaa2f4..e56040d07b 100644
--- a/target/riscv/insn_trans/trans_rvk.c.inc
+++ b/target/riscv/insn_trans/trans_rvk.c.inc
@@ -252,3 +252,93 @@  static bool trans_sha256sum1(DisasContext *ctx, arg_sha256sum1 *a)
 
     return true;
 }
+
+static bool trans_sha512sum0r(DisasContext *ctx, arg_sha512sum0r *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sum0r(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}
+
+static bool trans_sha512sum1r(DisasContext *ctx, arg_sha512sum1r *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sum1r(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}
+
+static bool trans_sha512sig0l(DisasContext *ctx, arg_sha512sig0l *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sig0l(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}
+
+static bool trans_sha512sig0h(DisasContext *ctx, arg_sha512sig0h *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sig0h(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}
+
+static bool trans_sha512sig1l(DisasContext *ctx, arg_sha512sig1l *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sig1l(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}
+
+static bool trans_sha512sig1h(DisasContext *ctx, arg_sha512sig1h *a)
+{
+    REQUIRE_32BIT(ctx);
+    REQUIRE_ZKNH(ctx);
+
+    TCGv dest = dest_gpr(ctx, a->rd);
+    TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
+    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+
+    gen_helper_sha512sig1h(dest, src1, src2);
+    gen_set_gpr(ctx, a->rd, dest);
+
+    return true;
+}