| Message ID | 20220204111533.10787-2-rogerq@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: k3-am64-main: Add GPMC & ELM nodes | expand |
On 04/02/22 4:45 pm, Roger Quadros wrote: > The GPMC is a unified memory controller dedicated for interfacing > with external memory devices like > - Asynchronous SRAM-like memories and ASICs > - Asynchronous, synchronous, and page mode burst NOR flash > - NAND flash > - Pseudo-SRAM devices > > Signed-off-by: Roger Quadros <rogerq@kernel.org> > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 19 +++++++++++++++++++ > arch/arm64/boot/dts/ti/k3-am642-evm.dts | 4 ++++ > arch/arm64/boot/dts/ti/k3-am642-sk.dts | 4 ++++ > 3 files changed, 27 insertions(+) > Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> [...] Regards Vignesh
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 012011dc619a..94ea5c304d73 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1289,4 +1289,23 @@ interrupt-names = "int0", "int1"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + + gpmc0: memory-controller@3b000000 { + compatible = "ti,am64-gpmc"; + power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 80 0>; + clock-names = "fck"; + reg = <0x00 0x03b000000 0x00 0x400>, + <0x00 0x050000000 0x00 0x8000000>; + reg-names = "cfg", "data"; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + gpmc,num-cs = <3>; + gpmc,num-waitpins = <2>; + #address-cells = <2>; + #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index e94ae178b1ae..6bd0c0876865 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -678,3 +678,7 @@ pinctrl-0 = <&main_mcan1_pins_default>; phys = <&transceiver2>; }; + +&gpmc0 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index a9785bec12df..40706aa61514 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -533,3 +533,7 @@ &main_mcan1 { status = "disabled"; }; + +&gpmc0 { + status = "disabled"; +};
The GPMC is a unified memory controller dedicated for interfacing with external memory devices like - Asynchronous SRAM-like memories and ASICs - Asynchronous, synchronous, and page mode burst NOR flash - NAND flash - Pseudo-SRAM devices Signed-off-by: Roger Quadros <rogerq@kernel.org> --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 19 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 4 ++++ arch/arm64/boot/dts/ti/k3-am642-sk.dts | 4 ++++ 3 files changed, 27 insertions(+)