ASoC: qcom: soundwire: Add support for controlling audio CGCR from HLOS

Commit Message

Srinivasa Rao Mandadapu Feb. 28, 2022, 8:09 a.m. UTC

Add support for controlling soundwire audio CGCR interface using clock framework
to make hclk ungating with software.
As per new hardware changes, software has to always ungate hclk if soundwire
is operational and keep it running.
This requirement is for latest LPASS chipsets for RX, TX and WSA path to work.

Signed-off-by: Srinivasa Rao Mandadapu <[e-mail]>
Co-developed-by: Venkata Prasad Potturu <[e-mail]>
Signed-off-by: Venkata Prasad Potturu <[e-mail]>
---
This patch set depends on:
	-- Clock driver patches with reset control support, yet to be posted.

 drivers/soundwire/qcom.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Mark Brown Feb. 28, 2022, 1:22 p.m. UTC | #1

On Mon, Feb 28, 2022 at 01:39:10PM +0530, Srinivasa Rao Mandadapu wrote:

> +	ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
> +	if (IS_ERR(ctrl->audio_cgcr))
> +		dev_err(dev, "Failed to get audio_cgcr reset required for soundwire-v1.6.0\n");

Doesn't this need a DT binding update?

Srinivasa Rao Mandadapu Feb. 28, 2022, 1:27 p.m. UTC | #2

On 2/28/2022 6:52 PM, Mark Brown wrote:
Thanks for Your Time Brown!!!
> On Mon, Feb 28, 2022 at 01:39:10PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> +	ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
>> +	if (IS_ERR(ctrl->audio_cgcr))
>> +		dev_err(dev, "Failed to get audio_cgcr reset required for soundwire-v1.6.0\n");
> Doesn't this need a DT binding update?

DT binding included in another patch which was sent recently. As this 
patch depends on clock driver patches didn't  mention the below dependence.

https://patchwork.kernel.org/project/alsa-devel/list/?series=618579

Mark Brown Feb. 28, 2022, 1:40 p.m. UTC | #3

On Mon, Feb 28, 2022 at 06:57:55PM +0530, Srinivasa Rao Mandadapu wrote:

> DT binding included in another patch which was sent recently. As this patch
> depends on clock driver patches didn't  mention the below dependence.

> https://patchwork.kernel.org/project/alsa-devel/list/?series=618579

This is all getting far too messy and complicated - you're sending lots
of different versions of multiple patch serieses with various
interdependencies and conflicts some of which you're forgetting to
mention and some of which are against things that haven't even been
posted yet.  Please slow down a bit here, take a bit more care and try
to rate limit the amount of stuff you're sending out at once.  It'll
make things a lot easier to manage and probably take less time and
effort overall.

Patch

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index fb183bd..440aad8 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -12,6 +12,7 @@ 
 #include <linux/of_irq.h>
 #include <linux/of_device.h>
 #include <linux/regmap.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 #include <linux/slimbus.h>
 #include <linux/soundwire/sdw.h>
@@ -129,6 +130,7 @@  struct qcom_swrm_ctrl {
 	struct device *dev;
 	struct regmap *regmap;
 	void __iomem *mmio;
+	struct reset_control *audio_cgcr;
 #ifdef CONFIG_DEBUG_FS
 	struct dentry *debugfs;
 #endif
@@ -618,6 +620,8 @@  static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
 	val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
 	val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
 
+	reset_control_reset(ctrl->audio_cgcr);
+
 	ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
 
 	/* Enable Auto enumeration */
@@ -1269,6 +1273,9 @@  static int qcom_swrm_probe(struct platform_device *pdev)
 	ctrl->bus.ops = &qcom_swrm_ops;
 	ctrl->bus.port_ops = &qcom_swrm_port_ops;
 	ctrl->bus.compute_params = &qcom_swrm_compute_params;
+	ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
+	if (IS_ERR(ctrl->audio_cgcr))
+		dev_err(dev, "Failed to get audio_cgcr reset required for soundwire-v1.6.0\n");
 
 	ret = qcom_swrm_get_port_config(ctrl);
 	if (ret)