| Message ID | 20220308201038.48386-8-xavier.roumegue@oss.nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i.MX8MP DW100 dewarper driver | expand |
On Tue, 08 Mar 2022 21:10:36 +0100, Xavier Roumegue wrote: > Add DT binding documentation for the Vivante DW100 dewarper engine found > on NXP i.MX8MP SoC > > Signed-off-by: Xavier Roumegue <xavier.roumegue@oss.nxp.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > .../devicetree/bindings/media/nxp,dw100.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/nxp,dw100.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/media/nxp,dw100.example.dts:25:18: fatal error: dt-bindings/power/imx8mp-power.h: No such file or directory 25 | #include <dt-bindings/power/imx8mp-power.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[1]: *** [scripts/Makefile.lib:378: Documentation/devicetree/bindings/media/nxp,dw100.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1398: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1603171 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Tue, Mar 08, 2022 at 09:10:36PM +0100, Xavier Roumegue wrote: > Add DT binding documentation for the Vivante DW100 dewarper engine found > on NXP i.MX8MP SoC > > Signed-off-by: Xavier Roumegue <xavier.roumegue@oss.nxp.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > .../devicetree/bindings/media/nxp,dw100.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/nxp,dw100.yaml > > diff --git a/Documentation/devicetree/bindings/media/nxp,dw100.yaml b/Documentation/devicetree/bindings/media/nxp,dw100.yaml > new file mode 100644 > index 000000000000..2c3b82be0b74 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/nxp,dw100.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/nxp,dw100.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX8MP DW100 Dewarper core > + > +maintainers: > + - Xavier Roumegue <xavier.roumegue@oss.nxp.com> > + > +description: |- > + The Dewarp Engine provides high-performance dewarp processing for the > + correction of the distortion that is introduced in images produced by fisheye > + and wide angle lenses. It is implemented with a line/tile-cache based > + architecture. With configurable address mapping look up tables and per tile > + processing, it successfully generates a corrected output image. > + The engine can be used to perform scaling, cropping and pixel format > + conversion. > + > +properties: > + compatible: > + enum: > + - nxp,dw100 Version of h/w and features are all discoverable? If so, add a note to that effect. If not, needs to be SoC specific. > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: The AXI clock > + - description: The AHB clock > + > + clock-names: > + items: > + - const: axi > + - const: ahb > + > + power-domains: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - power-domains > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/imx8mp-power.h> > + > + dewarp: dwe@32e30000 { > + compatible = "nxp,dw100"; > + reg = <0x32e30000 0x10000>; > + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, > + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; > + clock-names = "axi", "ahb"; > + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; > + }; > -- > 2.35.1 > >
On 3/9/22 02:23, Rob Herring wrote: > On Tue, Mar 08, 2022 at 09:10:36PM +0100, Xavier Roumegue wrote: >> Add DT binding documentation for the Vivante DW100 dewarper engine found >> on NXP i.MX8MP SoC >> >> Signed-off-by: Xavier Roumegue <xavier.roumegue@oss.nxp.com> >> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> >> --- >> .../devicetree/bindings/media/nxp,dw100.yaml | 69 +++++++++++++++++++ >> 1 file changed, 69 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/media/nxp,dw100.yaml >> >> diff --git a/Documentation/devicetree/bindings/media/nxp,dw100.yaml b/Documentation/devicetree/bindings/media/nxp,dw100.yaml >> new file mode 100644 >> index 000000000000..2c3b82be0b74 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/media/nxp,dw100.yaml >> @@ -0,0 +1,69 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/media/nxp,dw100.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: NXP i.MX8MP DW100 Dewarper core >> + >> +maintainers: >> + - Xavier Roumegue <xavier.roumegue@oss.nxp.com> >> + >> +description: |- >> + The Dewarp Engine provides high-performance dewarp processing for the >> + correction of the distortion that is introduced in images produced by fisheye >> + and wide angle lenses. It is implemented with a line/tile-cache based >> + architecture. With configurable address mapping look up tables and per tile >> + processing, it successfully generates a corrected output image. >> + The engine can be used to perform scaling, cropping and pixel format >> + conversion. >> + >> +properties: >> + compatible: >> + enum: >> + - nxp,dw100 > > Version of h/w and features are all discoverable? If so, add a note to > that effect. If not, needs to be SoC specific. The id register is not used as it turns out to be RW, with 0 as reset value..Hence not used by the driver. According to the IP vendor, this version is a single variant IP. Following this rationale, I would have been more accurate to suggest "nxp,dw100-v1" as compatible string. Unless you prefer "nxp,dw100-v1", I will go for "nxp,imx8mp-dw100" in the next series. > >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + clocks: >> + items: >> + - description: The AXI clock >> + - description: The AHB clock >> + >> + clock-names: >> + items: >> + - const: axi >> + - const: ahb >> + >> + power-domains: >> + maxItems: 1 >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - clocks >> + - clock-names >> + - power-domains >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/imx8mp-clock.h> >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/power/imx8mp-power.h> >> + >> + dewarp: dwe@32e30000 { >> + compatible = "nxp,dw100"; >> + reg = <0x32e30000 0x10000>; >> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, >> + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; >> + clock-names = "axi", "ahb"; >> + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; >> + }; >> -- >> 2.35.1 >> >>
diff --git a/Documentation/devicetree/bindings/media/nxp,dw100.yaml b/Documentation/devicetree/bindings/media/nxp,dw100.yaml new file mode 100644 index 000000000000..2c3b82be0b74 --- /dev/null +++ b/Documentation/devicetree/bindings/media/nxp,dw100.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/nxp,dw100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MP DW100 Dewarper core + +maintainers: + - Xavier Roumegue <xavier.roumegue@oss.nxp.com> + +description: |- + The Dewarp Engine provides high-performance dewarp processing for the + correction of the distortion that is introduced in images produced by fisheye + and wide angle lenses. It is implemented with a line/tile-cache based + architecture. With configurable address mapping look up tables and per tile + processing, it successfully generates a corrected output image. + The engine can be used to perform scaling, cropping and pixel format + conversion. + +properties: + compatible: + enum: + - nxp,dw100 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The AXI clock + - description: The AHB clock + + clock-names: + items: + - const: axi + - const: ahb + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/imx8mp-power.h> + + dewarp: dwe@32e30000 { + compatible = "nxp,dw100"; + reg = <0x32e30000 0x10000>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "axi", "ahb"; + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; + };