| Message ID | 20220316164645.2303510-1-edgar.iglesias@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | hw/arm: zynqmp: Add CRF and APU control to support PSCI | expand |
On Wed, 16 Mar 2022 at 16:46, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > This adds the necessary modeling to support some of our firmware > tests at EL3 implementing PSCI (TBM). These are the test-cases > that were previously relying on QEMU's builtin PSCI emulation. I wouldn't usually take patches new devices after softfreeze, but on the other hand this is addressing a regression, and it only affects the xilinx boards. Do you have a view on whether we should put this into 7.0 or defer to 7.1 ? thanks -- PMM
On Thu, Mar 17, 2022 at 8:15 PM Peter Maydell <peter.maydell@linaro.org> wrote: > On Wed, 16 Mar 2022 at 16:46, Edgar E. Iglesias > <edgar.iglesias@gmail.com> wrote: > > > > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > > > This adds the necessary modeling to support some of our firmware > > tests at EL3 implementing PSCI (TBM). These are the test-cases > > that were previously relying on QEMU's builtin PSCI emulation. > > I wouldn't usually take patches new devices after softfreeze, but > on the other hand this is addressing a regression, and it only > affects the xilinx boards. Do you have a view on whether we should put > this into 7.0 or defer to 7.1 ? > > Hi Peter, I'd lean slightly towards 7.0 (to allow our tests to pass cleanly on 7.0) but it's not of huge importance. Thanks, Edgar
On Thu, 17 Mar 2022 at 19:21, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > > On Thu, Mar 17, 2022 at 8:15 PM Peter Maydell <peter.maydell@linaro.org> wrote: >> >> On Wed, 16 Mar 2022 at 16:46, Edgar E. Iglesias >> <edgar.iglesias@gmail.com> wrote: >> > >> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> >> > >> > This adds the necessary modeling to support some of our firmware >> > tests at EL3 implementing PSCI (TBM). These are the test-cases >> > that were previously relying on QEMU's builtin PSCI emulation. >> >> I wouldn't usually take patches new devices after softfreeze, but >> on the other hand this is addressing a regression, and it only >> affects the xilinx boards. Do you have a view on whether we should put >> this into 7.0 or defer to 7.1 ? > I'd lean slightly towards 7.0 (to allow our tests to pass cleanly on 7.0) > but it's not of huge importance. Yeah, I agree -- I'll queue this into target-arm.next for 7.0. thanks -- PMM
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> This adds the necessary modeling to support some of our firmware tests at EL3 implementing PSCI (TBM). These are the test-cases that were previously relying on QEMU's builtin PSCI emulation. Cheers, Edgar ChangeLog: v2 -> v3: * Make RVBAR_ELx register reflect updated rvbar * Sample rvbar prop at reset * Remove setting of minimum_version_id_old * Use OBJECT_DECLARE_SIMPLE_TYPE v1 -> v2: * crf: Change APU_MAX_CPU to CRF_MAX_CPU * crf: Remove empty interfaces * crf: Add include guards * apu-ctrl: Change NUM_CPUS to APU_MAX_CPU * apu-ctrl: Fix indentation * apu-ctrl: Remove empty interfaces * apu-ctrl: Add include guards * xlnx-zynqmp: Add comment clarifying SER/DESerializer Edgar E. Iglesias (6): hw/arm/xlnx-zynqmp: Add an unimplemented SERDES area target/arm: Make rvbar settable after realize hw/misc: Add a model of the Xilinx ZynqMP CRF hw/arm/xlnx-zynqmp: Connect the ZynqMP CRF hw/misc: Add a model of the Xilinx ZynqMP APU Control hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control include/hw/arm/xlnx-zynqmp.h | 4 + include/hw/misc/xlnx-zynqmp-apu-ctrl.h | 93 +++++++++ include/hw/misc/xlnx-zynqmp-crf.h | 211 ++++++++++++++++++++ target/arm/cpu.h | 3 +- hw/arm/xlnx-zynqmp.c | 46 ++++- hw/misc/xlnx-zynqmp-apu-ctrl.c | 253 +++++++++++++++++++++++ hw/misc/xlnx-zynqmp-crf.c | 266 +++++++++++++++++++++++++ target/arm/cpu.c | 12 +- target/arm/helper.c | 10 +- hw/misc/meson.build | 2 + 10 files changed, 889 insertions(+), 11 deletions(-) create mode 100644 include/hw/misc/xlnx-zynqmp-apu-ctrl.h create mode 100644 include/hw/misc/xlnx-zynqmp-crf.h create mode 100644 hw/misc/xlnx-zynqmp-apu-ctrl.c create mode 100644 hw/misc/xlnx-zynqmp-crf.c