diff mbox series

[v14,4/6] dt-bindings: soc: mediatek: add gce-client-reg for MUTEX

Message ID 20220317143926.15835-5-moudy.ho@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add mutex support for MDP | expand

Commit Message

Moudy Ho March 17, 2022, 2:39 p.m. UTC
In order to allow modules with latency requirements such as MDP3
to set registers through CMDQ, add the relevant GCE property.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
 .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml  | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Rob Herring (Arm) March 21, 2022, 10:30 p.m. UTC | #1
On Thu, Mar 17, 2022 at 10:39:24PM +0800, Moudy Ho wrote:
> In order to allow modules with latency requirements such as MDP3
> to set registers through CMDQ, add the relevant GCE property.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
>  .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml  | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
> index f825af49f820..a4892979480c 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
> +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
> @@ -60,6 +60,14 @@ properties:
>        include/dt-bindings/gce/<chip>-gce.h of each chips.
>      $ref: /schemas/types.yaml#/definitions/phandle-array
>  
> +  mediatek,gce-client-reg:
> +    description: The register of client driver can be configured by gce with
> +      4 arguments defined in this property, such as phandle of gce, subsys id,
> +      register offset and size. Each GCE subsys id is mapping to a client
> +      defined in the header include/dt-bindings/gce/<chip>-gce.h.
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    maxItems: 1

items:
  items:
    - description: phandle of GCE
    - description: GCE subsys id
    - description: register offset
    - description: register size

> +
>  required:
>    - compatible
>    - reg
> -- 
> 2.18.0
> 
>
Moudy Ho March 23, 2022, 3:10 a.m. UTC | #2
On Mon, 2022-03-21 at 17:30 -0500, Rob Herring wrote:
> On Thu, Mar 17, 2022 at 10:39:24PM +0800, Moudy Ho wrote:
> > In order to allow modules with latency requirements such as MDP3
> > to set registers through CMDQ, add the relevant GCE property.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > Reviewed-by: CK Hu <ck.hu@mediatek.com>
> > ---
> >  .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml  | 8
> > ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yam
> > l
> > b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yam
> > l
> > index f825af49f820..a4892979480c 100644
> > ---
> > a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yam
> > l
> > +++
> > b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yam
> > l
> > @@ -60,6 +60,14 @@ properties:
> >        include/dt-bindings/gce/<chip>-gce.h of each chips.
> >      $ref: /schemas/types.yaml#/definitions/phandle-array
> >  
> > +  mediatek,gce-client-reg:
> > +    description: The register of client driver can be configured
> > by gce with
> > +      4 arguments defined in this property, such as phandle of
> > gce, subsys id,
> > +      register offset and size. Each GCE subsys id is mapping to a
> > client
> > +      defined in the header include/dt-bindings/gce/<chip>-gce.h.
> > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > +    maxItems: 1
> 
> items:
>   items:
>     - description: phandle of GCE
>     - description: GCE subsys id
>     - description: register offset
>     - description: register size
> 
Hi Rob,

Thanks for the review, I will follow the suggestions to make
corresponding corrections in the next version. Also, I'm sorry that I
left out the information about the dependent series that may cause YAML
checking fail.
ref: 
https://patchwork.kernel.org/project/linux-mediatek/list/?series=621899

Thanks,
Moudy
> > +
> >  required:
> >    - compatible
> >    - reg
> > -- 
> > 2.18.0
> > 
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
index f825af49f820..a4892979480c 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
@@ -60,6 +60,14 @@  properties:
       include/dt-bindings/gce/<chip>-gce.h of each chips.
     $ref: /schemas/types.yaml#/definitions/phandle-array
 
+  mediatek,gce-client-reg:
+    description: The register of client driver can be configured by gce with
+      4 arguments defined in this property, such as phandle of gce, subsys id,
+      register offset and size. Each GCE subsys id is mapping to a client
+      defined in the header include/dt-bindings/gce/<chip>-gce.h.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
 required:
   - compatible
   - reg