| Message ID | 20220327223927.20848-14-granquet@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: Add mt8195 DisplayPort driver | expand |
On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the yuv422 en bit to SoC specific config > > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 6d4d8c6ec47d..40254cd9d168 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -132,6 +132,7 @@ struct mtk_dpi_conf { > /* HSIZE and VSIZE mask (no shift) */ > u32 hvsize_mask; > u32 channel_swap_shift; > + u32 yuv422_en_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -356,7 +357,8 @@ static void mtk_dpi_config_channel_swap(struct > mtk_dpi *dpi, > > static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->yuv422_en_bit : > 0, > + dpi->conf->yuv422_en_bit); > } > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > @@ -824,6 +826,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > + .yuv422_en_bit = YUV422_EN, > .limit = &mtk_dpi_limit, > }; > > @@ -839,6 +842,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > + .yuv422_en_bit = YUV422_EN, > .limit = &mtk_dpi_limit, > }; > > @@ -853,6 +857,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > + .yuv422_en_bit = YUV422_EN, > .limit = &mtk_dpi_limit, > }; > > @@ -867,6 +872,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .dimension_mask = HPW_MASK, > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > + .yuv422_en_bit = YUV422_EN, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 6d4d8c6ec47d..40254cd9d168 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -132,6 +132,7 @@ struct mtk_dpi_conf { /* HSIZE and VSIZE mask (no shift) */ u32 hvsize_mask; u32 channel_swap_shift; + u32 yuv422_en_bit; const struct mtk_dpi_yc_limit *limit; }; @@ -356,7 +357,8 @@ static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi, static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable) { - mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN); + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->yuv422_en_bit : 0, + dpi->conf->yuv422_en_bit); } static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable) @@ -824,6 +826,7 @@ static const struct mtk_dpi_conf mt8173_conf = { .dimension_mask = HPW_MASK, .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, .limit = &mtk_dpi_limit, }; @@ -839,6 +842,7 @@ static const struct mtk_dpi_conf mt2701_conf = { .dimension_mask = HPW_MASK, .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, .limit = &mtk_dpi_limit, }; @@ -853,6 +857,7 @@ static const struct mtk_dpi_conf mt8183_conf = { .dimension_mask = HPW_MASK, .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, .limit = &mtk_dpi_limit, }; @@ -867,6 +872,7 @@ static const struct mtk_dpi_conf mt8192_conf = { .dimension_mask = HPW_MASK, .hvsize_mask = HSIZE_MASK, .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, .limit = &mtk_dpi_limit, };