diff mbox series

[v2,5/7] ARM: dts: lan966x: add flexcom SPI nodes

Message ID 20220304153548.3364480-6-michael@walle.cc (mailing list archive)
State New, archived
Headers show
Series ARM: dts: lan966x: dtsi improvements and KSwitch D10 support | expand

Commit Message

Michael Walle March 4, 2022, 3:35 p.m. UTC 
Add all the SPI nodes for the flexcom IP block. Keep them
disabled by default.

Signed-off-by: Michael Walle <michael@walle.cc>
---
 arch/arm/boot/dts/lan966x.dtsi | 75 ++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)

Comments

Claudiu Beznea March 30, 2022, 1:26 p.m. UTC | #1 
On 04.03.2022 17:35, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add all the SPI nodes for the flexcom IP block. Keep them
> disabled by default.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


> ---
>  arch/arm/boot/dts/lan966x.dtsi | 75 ++++++++++++++++++++++++++++++++++
>  1 file changed, 75 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index d7eacb0144f5..a61d394ad04d 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -105,6 +105,21 @@ usart0: serial@200 {
>                                 atmel,fifo-size = <32>;
>                                 status = "disabled";
>                         };
> +
> +                       spi0: spi@400 {
> +                               compatible = "atmel,at91rm9200-spi";
> +                               reg = <0x400 0x200>;
> +                               interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(2)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "spi_clk";
> +                               atmel,fifo-size = <32>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx1: flexcom@e0044000 {
> @@ -128,6 +143,21 @@ usart1: serial@200 {
>                                 atmel,fifo-size = <32>;
>                                 status = "disabled";
>                         };
> +
> +                       spi1: spi@400 {
> +                               compatible = "atmel,at91rm9200-spi";
> +                               reg = <0x400 0x200>;
> +                               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(4)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "spi_clk";
> +                               atmel,fifo-size = <32>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 trng: rng@e0048000 {
> @@ -168,6 +198,21 @@ usart2: serial@200 {
>                                 atmel,fifo-size = <32>;
>                                 status = "disabled";
>                         };
> +
> +                       spi2: spi@400 {
> +                               compatible = "atmel,at91rm9200-spi";
> +                               reg = <0x400 0x200>;
> +                               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(6)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "spi_clk";
> +                               atmel,fifo-size = <32>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx3: flexcom@e0064000 {
> @@ -191,6 +236,21 @@ usart3: serial@200 {
>                                 atmel,fifo-size = <32>;
>                                 status = "disabled";
>                         };
> +
> +                       spi3: spi@400 {
> +                               compatible = "atmel,at91rm9200-spi";
> +                               reg = <0x400 0x200>;
> +                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(8)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "spi_clk";
> +                               atmel,fifo-size = <32>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 dma0: dma-controller@e0068000 {
> @@ -233,6 +293,21 @@ usart4: serial@200 {
>                                 atmel,fifo-size = <32>;
>                                 status = "disabled";
>                         };
> +
> +                       spi4: spi@400 {
> +                               compatible = "atmel,at91rm9200-spi";
> +                               reg = <0x400 0x200>;
> +                               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(10)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "spi_clk";
> +                               atmel,fifo-size = <32>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 timer0: timer@e008c000 {
> --
> 2.30.2
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index d7eacb0144f5..a61d394ad04d 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -105,6 +105,21 @@  usart0: serial@200 {
 				atmel,fifo-size = <32>;
 				status = "disabled";
 			};
+
+			spi0: spi@400 {
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(2)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				clock-names = "spi_clk";
+				atmel,fifo-size = <32>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		flx1: flexcom@e0044000 {
@@ -128,6 +143,21 @@  usart1: serial@200 {
 				atmel,fifo-size = <32>;
 				status = "disabled";
 			};
+
+			spi1: spi@400 {
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(4)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				clock-names = "spi_clk";
+				atmel,fifo-size = <32>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		trng: rng@e0048000 {
@@ -168,6 +198,21 @@  usart2: serial@200 {
 				atmel,fifo-size = <32>;
 				status = "disabled";
 			};
+
+			spi2: spi@400 {
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(6)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				clock-names = "spi_clk";
+				atmel,fifo-size = <32>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		flx3: flexcom@e0064000 {
@@ -191,6 +236,21 @@  usart3: serial@200 {
 				atmel,fifo-size = <32>;
 				status = "disabled";
 			};
+
+			spi3: spi@400 {
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(8)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				clock-names = "spi_clk";
+				atmel,fifo-size = <32>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		dma0: dma-controller@e0068000 {
@@ -233,6 +293,21 @@  usart4: serial@200 {
 				atmel,fifo-size = <32>;
 				status = "disabled";
 			};
+
+			spi4: spi@400 {
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0x400 0x200>;
+				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
+				       <&dma0 AT91_XDMAC_DT_PERID(10)>;
+				dma-names = "tx", "rx";
+				clocks = <&nic_clk>;
+				clock-names = "spi_clk";
+				atmel,fifo-size = <32>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		timer0: timer@e008c000 {