| Message ID | 20220315191255.221473-5-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | RZN1 DMA support | expand |
Quoting Miquel Raynal (2022-03-15 12:12:51) > The dmamux register is located within the system controller. > > Without syscon, we need an extra helper in order to give write access to > this register to a dmamux driver. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
Hello, miquel.raynal@bootlin.com wrote on Tue, 15 Mar 2022 20:12:51 +0100: > The dmamux register is located within the system controller. > > Without syscon, we need an extra helper in order to give write access to > this register to a dmamux driver. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > --- > drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- > include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ > 2 files changed, 45 insertions(+), 1 deletion(-) > create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h > [...] > /* register/bit pairs are encoded as an uint16_t */ > static void > clk_rdesc_set(struct r9a06g032_priv *clocks, > @@ -922,6 +948,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) > clocks->reg = of_iomap(np, 0); > if (WARN_ON(!clocks->reg)) > return -ENOMEM; > + As we are post -rc1 I will repost this series as a v6 after rebasing. While at it I'll get rid of this extra new line but that's basically all what I plan to change. As this series brings the basics for more RZN1 support (because of this specific sysctrl patch), it is kind of a base for more contributions which are in the pipe (UART, USB, RTC, Switch, etc) so hopefully it is now ready to be accepted. Thanks, Miquèl
diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..edcdbe3152f0 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include <linux/pm_clock.h> #include <linux/pm_domain.h> #include <linux/slab.h> +#include <linux/soc/renesas/r9a06g032-sysctrl.h> #include <linux/spinlock.h> #include <dt-bindings/clock/r9a06g032-sysctrl.h> +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,29 @@ struct r9a06g032_priv { void __iomem *reg; }; +/* Exported helper to access the DMAMUX register */ +static struct r9a06g032_priv *sysctrl_priv; +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux); + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -922,6 +948,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) clocks->reg = of_iomap(np, 0); if (WARN_ON(!clocks->reg)) return -ENOMEM; + for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) { const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i]; const char *parent_name = d->source ? @@ -963,7 +990,13 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) if (error) return error; - return r9a06g032_add_clk_domain(dev); + error = r9a06g032_add_clk_domain(dev); + if (error) + return error; + + sysctrl_priv = clocks; + + return 0; } static const struct of_device_id r9a06g032_match[] = { diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */
The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h