| Message ID | 20220406160123.1272911-2-l.stach@pengutronix.de |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i.MX8MP HDMI support | expand |
Hi Lucas, On 06/04/2022 18:01, Lucas Stach wrote: > Allow vendor PHY implementations to reset PHYs with different polarity > than the current Gen2 reset. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++ > include/drm/bridge/dw_hdmi.h | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > index 4befc104d220..7600f26aab27 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > @@ -1365,6 +1365,13 @@ void dw_hdmi_phy_reset(struct dw_hdmi *hdmi) > } > EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset); > > +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi) > +{ > + hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > + hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > +} > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset_active_low); > + > void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address) > { > hdmi_phy_test_clear(hdmi, 1); > diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h > index 2a1f85f9a8a3..9b3d52a1e62a 100644 > --- a/include/drm/bridge/dw_hdmi.h > +++ b/include/drm/bridge/dw_hdmi.h > @@ -190,6 +190,7 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, > void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable); > void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable); > void dw_hdmi_phy_reset(struct dw_hdmi *hdmi); > +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi); > > enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > void *data); This has already been submitted at https://lore.kernel.org/r/800262112191a720639ba321be18f0926d4e1d2a.1649230434.git.Sandor.yu@nxp.com
Hi Neil, Am Donnerstag, dem 07.04.2022 um 10:30 +0200 schrieb Neil Armstrong: > Hi Lucas, > > On 06/04/2022 18:01, Lucas Stach wrote: > > Allow vendor PHY implementations to reset PHYs with different polarity > > than the current Gen2 reset. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > --- > > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++ > > include/drm/bridge/dw_hdmi.h | 1 + > > 2 files changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > > index 4befc104d220..7600f26aab27 100644 > > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > > @@ -1365,6 +1365,13 @@ void dw_hdmi_phy_reset(struct dw_hdmi *hdmi) > > } > > EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset); > > > > +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi) > > +{ > > + hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); > > + hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); > > +} > > +EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset_active_low); > > + > > void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address) > > { > > hdmi_phy_test_clear(hdmi, 1); > > diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h > > index 2a1f85f9a8a3..9b3d52a1e62a 100644 > > --- a/include/drm/bridge/dw_hdmi.h > > +++ b/include/drm/bridge/dw_hdmi.h > > @@ -190,6 +190,7 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, > > void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable); > > void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable); > > void dw_hdmi_phy_reset(struct dw_hdmi *hdmi); > > +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi); > > > > enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, > > void *data); > > This has already been submitted at https://lore.kernel.org/r/800262112191a720639ba321be18f0926d4e1d2a.1649230434.git.Sandor.yu@nxp.com Thanks for the pointer, seems I missed this series. I'll switch to this function instead. Regards, Lucas
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index 4befc104d220..7600f26aab27 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -1365,6 +1365,13 @@ void dw_hdmi_phy_reset(struct dw_hdmi *hdmi) } EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset); +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi) +{ + hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); + hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); +} +EXPORT_SYMBOL_GPL(dw_hdmi_phy_reset_active_low); + void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address) { hdmi_phy_test_clear(hdmi, 1); diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h index 2a1f85f9a8a3..9b3d52a1e62a 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h @@ -190,6 +190,7 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable); void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable); void dw_hdmi_phy_reset(struct dw_hdmi *hdmi); +void dw_hdmi_phy_reset_active_low(struct dw_hdmi *hdmi); enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data);
Allow vendor PHY implementations to reset PHYs with different polarity than the current Gen2 reset. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++ include/drm/bridge/dw_hdmi.h | 1 + 2 files changed, 8 insertions(+)