diff mbox series

drm/amdgpu: Fix incorrect enum type

Message ID 20220408075820.10396-1-h0tc0d3@gmail.com (mailing list archive)
State New, archived
Headers show
Series drm/amdgpu: Fix incorrect enum type | expand

Commit Message

Grigory Vasilyev April 8, 2022, 7:58 a.m. UTC
Instead of the 'amdgpu_ring_priority_level' type,
the 'amdgpu_gfx_pipe_priority' type was used,
which is an error when setting ring priority.
This is a minor error, but may cause problems in the future.

Instead of AMDGPU_RING_PRIO_2 = 2, we can use AMDGPU_RING_PRIO_MAX = 3,
but AMDGPU_RING_PRIO_2 = 2 is used for compatibility with
AMDGPU_GFX_PIPE_PRIO_HIGH = 2, and not change the behavior of the
code.

Signed-off-by: Grigory Vasilyev <h0tc0d3@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

Alex Deucher April 8, 2022, 8:50 p.m. UTC | #1
Applied.  Thanks!

On Fri, Apr 8, 2022 at 3:58 AM Grigory Vasilyev <h0tc0d3@gmail.com> wrote:
>
> Instead of the 'amdgpu_ring_priority_level' type,
> the 'amdgpu_gfx_pipe_priority' type was used,
> which is an error when setting ring priority.
> This is a minor error, but may cause problems in the future.
>
> Instead of AMDGPU_RING_PRIO_2 = 2, we can use AMDGPU_RING_PRIO_MAX = 3,
> but AMDGPU_RING_PRIO_2 = 2 is used for compatibility with
> AMDGPU_GFX_PIPE_PRIO_HIGH = 2, and not change the behavior of the
> code.
>
> Signed-off-by: Grigory Vasilyev <h0tc0d3@gmail.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 2 +-
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c  | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index b3081c28db0a..1d9120a4b3f5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -4745,7 +4745,7 @@ static int gfx_v10_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
>                 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
>                 + ring->pipe;
>         hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
> -                       AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_GFX_PIPE_PRIO_NORMAL;
> +                       AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
>         /* type-2 packets are deprecated on MEC, use type-3 instead */
>         r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
>                              hw_prio, NULL);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 5554084ec1f1..9bc26395f833 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1929,7 +1929,7 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
>                 + ring->pipe;
>
>         hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
> -                       AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_RING_PRIO_DEFAULT;
> +                       AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
>         /* type-2 packets are deprecated on MEC, use type-3 instead */
>         r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
>                              hw_prio, NULL);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 71cf025a2bbd..029c97c92463 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -2278,7 +2278,7 @@ static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
>                 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
>                 + ring->pipe;
>         hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
> -                       AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_GFX_PIPE_PRIO_NORMAL;
> +                       AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
>         /* type-2 packets are deprecated on MEC, use type-3 instead */
>         return amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
>                                 hw_prio, NULL);
> --
> 2.35.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index b3081c28db0a..1d9120a4b3f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4745,7 +4745,7 @@  static int gfx_v10_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
 		+ ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
 		+ ring->pipe;
 	hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
-			AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_GFX_PIPE_PRIO_NORMAL;
+			AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
 	/* type-2 packets are deprecated on MEC, use type-3 instead */
 	r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
 			     hw_prio, NULL);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 5554084ec1f1..9bc26395f833 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1929,7 +1929,7 @@  static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
 		+ ring->pipe;
 
 	hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
-			AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_RING_PRIO_DEFAULT;
+			AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
 	/* type-2 packets are deprecated on MEC, use type-3 instead */
 	r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
 			     hw_prio, NULL);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 71cf025a2bbd..029c97c92463 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2278,7 +2278,7 @@  static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
 		+ ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
 		+ ring->pipe;
 	hw_prio = amdgpu_gfx_is_high_priority_compute_queue(adev, ring) ?
-			AMDGPU_GFX_PIPE_PRIO_HIGH : AMDGPU_GFX_PIPE_PRIO_NORMAL;
+			AMDGPU_RING_PRIO_2 : AMDGPU_RING_PRIO_DEFAULT;
 	/* type-2 packets are deprecated on MEC, use type-3 instead */
 	return amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, irq_type,
 				hw_prio, NULL);