[v2,0/7] Add the iMX8MP PCIe support

Message

Richard Zhu March 7, 2022, 9:07 a.m. UTC

Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and the
following commits.
  - one codes refine patch-set[5].
  - two Fixes[2],[3].
  - one binding commit[4].
  - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM EVK.
    b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board
    aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
    cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support

Sorry about that there may be some conflictions when do the codes merge.
I'm waiting for the ack now, and will re-base them in a proper sequence later.

This series patches add the i.MX8MP PCIe support and tested on i.MX8MM EVK and
i.MX8MP EVk boards. The PCIe NVME works fine on both boards.

- i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
  Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
- Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
  And share as much as possible codes with i.MX8MM PCIe PHY.
- Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
  driver.

Main changes v1-->v2:
- It's my fault forget including Vinod, re-send v2 after include Vinod
  and [e-mail].
- List the basements of this patch-set. The branch, codes changes and so on.
- Clean up some useless register and bit definitions in #3 patch.

[1]https://patchwork.kernel.org/project/linux-arm-kernel/cover/[e-mail]/
[2]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
[3]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
[4]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
[5]https://patchwork.ozlabs.org/project/linux-pci/cover/[e-mail]/

NOTE:
Based git <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
Based branch <pci/imx6>

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55 ++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46 ++++++++++++++++++-
drivers/pci/controller/dwc/pci-imx6.c                        |  19 +++++++-
drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------
drivers/reset/reset-imx7.c                                   |   1 +
7 files changed, 286 insertions(+), 45 deletions(-)

[PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
[PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
[PATCH v2 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY
[PATCH v2 4/7] dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible
[PATCH v2 5/7] arm64: dts: imx8mp: add the iMX8MP PCIe support
[PATCH v2 6/7] arm64: dts: imx8mp-evk: Add PCIe support
[PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support

Comments

Alexander Stein March 9, 2022, 7:57 a.m. UTC | #1

Hello Richard,

Am Montag, 7. März 2022, 10:07:27 CET schrieb Richard Zhu:
> Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and the
> following commits.
>   - one codes refine patch-set[5].
>   - two Fixes[2],[3].
>   - one binding commit[4].
>   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM EVK.
> b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk
> board aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
>     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> 
> Sorry about that there may be some conflictions when do the codes merge.
> I'm waiting for the ack now, and will re-base them in a proper sequence
> later.

Thanks for providing the dependency list. Unfortunately they did not apply 
without error on my local tree, but this is caused by other patches I track.
I managed to fix the conflicts, I think.
Eventually I was able to get a PCIe M.2 ethernet interface working on my 
TQMa8MPxL based board. iperf showed >900MBit/s Tx and > 700 MBit/s Rx.
Thanks for your effort. Once the depenencies and reviews are settled, you'll 
get my tested-by.

Thanks again and regards
Alexander

> This series patches add the i.MX8MP PCIe support and tested on i.MX8MM EVK
> and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> 
> - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
>   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
>   And share as much as possible codes with i.MX8MM PCIe PHY.
> - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
>   driver.
> 
> Main changes v1-->v2:
> - It's my fault forget including Vinod, re-send v2 after include Vinod
>   and [e-mail].
> - List the basements of this patch-set. The branch, codes changes and so on.
> - Clean up some useless register and bit definitions in #3 patch.
> 
> [1]https://patchwork.kernel.org/project/linux-arm-kernel/cover/2022022820173
> [e-mail]/
> [2]https://patchwork.ozlabs.org/project/linux-pci/patch/1646289275-17813-1-> [e-mail]/
> [3]https://patchwork.ozlabs.org/project/linux-pci/patch/1645672013-8949-1-g
> [e-mail]/
> [4]https://patchwork.ozlabs.org/project/linux-pci/patch/1646293805-18248-1-> [e-mail]/
> [5]https://patchwork.ozlabs.org/project/linux-pci/cover/1645760667-10510-1-> [e-mail]/
> 
> NOTE:
> Based git <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> Based branch <pci/imx6>
> 
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55
> ++++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi           
>         |  46 ++++++++++++++++++- drivers/pci/controller/dwc/pci-imx6.c    
>                    |  19 +++++++-
> drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------
> ------- drivers/reset/reset-imx7.c                                   |   1 +
> 7 files changed, 286 insertions(+), 45 deletions(-)
> 
> [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
> [PATCH v2 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY
> [PATCH v2 4/7] dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible
> [PATCH v2 5/7] arm64: dts: imx8mp: add the iMX8MP PCIe support
> [PATCH v2 6/7] arm64: dts: imx8mp-evk: Add PCIe support
> [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support

Richard Zhu March 10, 2022, 2:03 a.m. UTC | #2

> -----Original Message-----
> From: Alexander Stein <[e-mail]>
> Sent: 2022年3月9日 15:57
> To: Hongxing Zhu <[e-mail]>
> Cc: [e-mail]; [e-mail]; [e-mail];
> [e-mail]; [e-mail]; [e-mail];
> [e-mail]; [e-mail]; [e-mail];
> [e-mail]; [e-mail];
> [e-mail]; [e-mail]; dl-linux-imx
> <[e-mail]>
> Subject: Re: (EXT) [PATCH v2 0/7] Add the iMX8MP PCIe support
> 
> Hello Richard,
> 
> Am Montag, 7. März 2022, 10:07:27 CET schrieb Richard Zhu:
> > Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and
> > the following commits.
> >   - one codes refine patch-set[5].
> >   - two Fixes[2],[3].
> >   - one binding commit[4].
> >   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM
> EVK.
> > b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on imx8mm
> > evk board aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
> >     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> >
> > Sorry about that there may be some conflictions when do the codes merge.
> > I'm waiting for the ack now, and will re-base them in a proper
> > sequence later.
> 
> Thanks for providing the dependency list. Unfortunately they did not apply
> without error on my local tree, but this is caused by other patches I track.
> I managed to fix the conflicts, I think.
> Eventually I was able to get a PCIe M.2 ethernet interface working on my
> TQMa8MPxL based board. iperf showed >900MBit/s Tx and > 700 MBit/s Rx.
> Thanks for your effort. Once the depenencies and reviews are settled, you'll get
> my tested-by.
Hi Alexander
It's great that this patch-set works on your board.
Thanks for your help to test it.

Best Regards
Richard Zhu
> 
> Thanks again and regards
> Alexander
> 
> > This series patches add the i.MX8MP PCIe support and tested on i.MX8MM
> > EVK and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> >
> > - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
> >   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> >   And share as much as possible codes with i.MX8MM PCIe PHY.
> > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> >   driver.
> >
> > Main changes v1-->v2:
> > - It's my fault forget including Vinod, re-send v2 after include Vinod
> >   and [e-mail].
> > - List the basements of this patch-set. The branch, codes changes and so on.
> > - Clean up some useless register and bit definitions in #3 patch.
> >
> > [1]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F2022022820
> 1
> >
> 73&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C5a7b5c3d050242c
> b9aa808d
> >
> a01a26c70%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637824
> 094369636
> >
> 537%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMz
> IiLCJBTi
> >
> I6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=ZXo1zTOOSxOsGe8IMDr1
> axWcqCnf
> > uL8KAaOdIGk1nxI%3D&amp;reserved=0
> > [e-mail]/
> > [2]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646289275-17813-
> 1
> >
> -&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C5a7b5c3d050242cb9
> aa808da
> >
> 01a26c70%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6378240
> 943696365
> >
> 37%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI
> >
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=K786yDfjsjIV9QpT6Hyawl
> EkQv%2F
> > hQNVBuXk2UU2p%2BXs%3D&amp;reserved=0>
> > [e-mail]/
> > [3]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1645672013-8949-1
> -
> >
> g&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C5a7b5c3d050242cb
> 9aa808da
> >
> 01a26c70%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6378240
> 943696365
> >
> 37%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI
> >
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=Dp2GU3iDuTR91Y6Awqbn
> 0AxPvbBe4
> > %2BtPVvylgzFeWOU%3D&amp;reserved=0
> > [e-mail]/
> > [4]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646293805-18248-
> 1
> >
> -&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C5a7b5c3d050242cb9
> aa808da
> >
> 01a26c70%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6378240
> 943696365
> >
> 37%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI
> >
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=hsbURaSevBxxRfus%2Bjre
> Ppo96Oi
> > %2Fel%2BSceueYdIay%2B8%3D&amp;reserved=0>
> > [e-mail]/
> > [5]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fcover%2F1645760667-10510-
> 1
> >
> -&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C5a7b5c3d050242cb9
> aa808da
> >
> 01a26c70%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6378240
> 943696365
> >
> 37%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI
> >
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=uYwnISUWBSP1yBxe5qfRT
> a%2F9I7y
> > 8YqfyEZXmts5D9Ys%3D&amp;reserved=0>
> > [e-mail]/
> >
> > NOTE:
> > Based git
> > <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> > Based branch <pci/imx6>
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55
> > ++++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi
> >         |  46 ++++++++++++++++++-
> drivers/pci/controller/dwc/pci-imx6.c
> >                    |  19 +++++++-
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205
> >
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++-----
> >
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++-----
> > ------- drivers/reset/reset-imx7.c                                   |
> 1 +
> > 7 files changed, 286 insertions(+), 45 deletions(-)
> >
> > [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> > [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v2
> > 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY [PATCH v2 4/7]
> > dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible [PATCH v2 5/7]
> > arm64: dts: imx8mp: add the iMX8MP PCIe support [PATCH v2 6/7] arm64:
> > dts: imx8mp-evk: Add PCIe support [PATCH v2 7/7] PCI: imx6: Add the
> > iMX8MP PCIe support
> 
> 
>

Tim Harvey April 7, 2022, 8:41 p.m. UTC | #3

On Mon, Mar 7, 2022 at 1:18 AM Richard Zhu <[e-mail]> wrote:
>
> Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and the
> following commits.
>   - one codes refine patch-set[5].
>   - two Fixes[2],[3].
>   - one binding commit[4].
>   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM EVK.
>     b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board
>     aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
>     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
>
> Sorry about that there may be some conflictions when do the codes merge.
> I'm waiting for the ack now, and will re-base them in a proper sequence later.
>
> This series patches add the i.MX8MP PCIe support and tested on i.MX8MM EVK and
> i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
>
> - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
>   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
>   And share as much as possible codes with i.MX8MM PCIe PHY.
> - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
>   driver.
>
> Main changes v1-->v2:
> - It's my fault forget including Vinod, re-send v2 after include Vinod
>   and [e-mail].
> - List the basements of this patch-set. The branch, codes changes and so on.
> - Clean up some useless register and bit definitions in #3 patch.
>
> [1]https://patchwork.kernel.org/project/linux-arm-kernel/cover/[e-mail]/
> [2]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [3]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [4]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [5]https://patchwork.ozlabs.org/project/linux-pci/cover/[e-mail]/
>
> NOTE:
> Based git <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> Based branch <pci/imx6>
>
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46 ++++++++++++++++++-
> drivers/pci/controller/dwc/pci-imx6.c                        |  19 +++++++-
> drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------
> drivers/reset/reset-imx7.c                                   |   1 +
> 7 files changed, 286 insertions(+), 45 deletions(-)
>
> [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
> [PATCH v2 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY
> [PATCH v2 4/7] dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible
> [PATCH v2 5/7] arm64: dts: imx8mp: add the iMX8MP PCIe support
> [PATCH v2 6/7] arm64: dts: imx8mp-evk: Add PCIe support
> [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support
>

Richard,

Thanks for working on this!

Do you plan on submitting another version soon? I've tried to test
this with an imx8mp board I'm bringing up and while the host
controller enumerates I fail to get a link to a device. It's very
likely I am missing something as this series depends on the IMX8MP
blk-ctrl and gpc series which I also can't cleanly apply. Lucas just
submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl series' [1]
yet I can't find a repo/branch that applies to either.

Perhaps you have a git repo somewhere I can look at while we wait for
imx8mp blk-ctl/gpc to settle and you to submit a v3?

Best Regards,

Tim
[1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=629586

Richard Zhu April 8, 2022, 3:14 a.m. UTC | #4

> -----Original Message-----
> From: Tim Harvey <[e-mail]>
> Sent: 2022年4月8日 4:42
> To: Hongxing Zhu <[e-mail]>; Lucas Stach
> <[e-mail]>
> Cc: Philipp Zabel <[e-mail]>; [e-mail]; Lorenzo
> Pieralisi <[e-mail]>; Rob Herring <[e-mail]>; Shawn
> Guo <[e-mail]>; Vinod Koul <[e-mail]>; Alexander Stein
> <[e-mail]>; [e-mail]; Device
> Tree Mailing List <[e-mail]>; [e-mail];
> Linux ARM Mailing List <[e-mail]>; open list
> <[e-mail]>; Sascha Hauer <[e-mail]>;
> dl-linux-imx <[e-mail]>
> Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> 
> On Mon, Mar 7, 2022 at 1:18 AM Richard Zhu <[e-mail]>
> wrote:
> >
> > Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and
> > the following commits.
> >   - one codes refine patch-set[5].
> >   - two Fixes[2],[3].
> >   - one binding commit[4].
> >   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM
> EVK.
> >     b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on
> imx8mm evk board
> >     aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
> >     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> >
> > Sorry about that there may be some conflictions when do the codes merge.
> > I'm waiting for the ack now, and will re-base them in a proper sequence later.
> >
> > This series patches add the i.MX8MP PCIe support and tested on i.MX8MM
> > EVK and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> >
> > - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
> >   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> >   And share as much as possible codes with i.MX8MM PCIe PHY.
> > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> >   driver.
> >
> > Main changes v1-->v2:
> > - It's my fault forget including Vinod, re-send v2 after include Vinod
> >   and [e-mail].
> > - List the basements of this patch-set. The branch, codes changes and so on.
> > - Clean up some useless register and bit definitions in #3 patch.
> >
> > [1]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F2022022820
> 1
> >
> 731.3330192-1-l.stach%40pengutronix.de%2F&amp;data=04%7C01%7Chongx
> ing.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=namjBp1ZpawS9s25%2FwS8aOnd2A7rHTK2rQRwG4V0Dt8%3D&
> amp;reserv
> > ed=0
> > [2]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646289275-17813-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=dWr1ui7eIc92iWzvo8VKPXTkNel3NR9yNxD5CyHIuV0%3D&amp;r
> eserved
> > =0
> > [3]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1645672013-8949-1
> -
> >
> git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.z
> >
> hu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc2
> b4c6fa92c
> >
> d99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWFp
> bGZsb3d8eyJW
> >
> IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> 000&
> >
> amp;sdata=FCis4KE9KZqS8Ou6I0KTQu%2FayWSm%2Ftj%2Bcrd68EThsNs%3D
> &amp;res
> > erved=0
> > [4]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646293805-18248-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=sbYuLpfBFUImVi7YLe%2FCYvQNxleK2tnHKfr%2FByoAJsA%3D&am
> p;rese
> > rved=0
> > [5]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fcover%2F1645760667-10510-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> 2b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=tRZQBUN4CleGFFbxqNn4W1kUwCgATERggfa8qEQyc9E%3D&am
> p;reserved
> > =0
> >
> > NOTE:
> > Based git
> > <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> > Based branch <pci/imx6>
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55
> ++++++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46
> ++++++++++++++++++-
> > drivers/pci/controller/dwc/pci-imx6.c                        |  19
> +++++++-
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++-----------------
> > drivers/reset/reset-imx7.c                                   |   1 +
> > 7 files changed, 286 insertions(+), 45 deletions(-)
> >
> > [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> > [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v2
> > 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY [PATCH v2 4/7]
> > dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible [PATCH v2 5/7]
> > arm64: dts: imx8mp: add the iMX8MP PCIe support [PATCH v2 6/7] arm64:
> > dts: imx8mp-evk: Add PCIe support [PATCH v2 7/7] PCI: imx6: Add the
> > iMX8MP PCIe support
> >
> 
> Richard,
> 
> Thanks for working on this!
> 
> Do you plan on submitting another version soon? I've tried to test this with an
> imx8mp board I'm bringing up and while the host controller enumerates I fail
> to get a link to a device. It's very likely I am missing something as this series
> depends on the IMX8MP blk-ctrl and gpc series which I also can't cleanly apply.
> Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl
> series' [1] yet I can't find a repo/branch that applies to either.
> 
> Perhaps you have a git repo somewhere I can look at while we wait for
> imx8mp blk-ctl/gpc to settle and you to submit a v3?
Hi Tim:
Thanks for your kindly help to do the tests.
I had listed the dependencies in the cover-letter log.
Alexander and I used to test this series commits based on the V5.17 kernel.

Lucas had provided some review comments and suggestions about the PLL bits
 manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this series.
And he suggested to let the HSIOMIX blk-ctrl make this PLL as a real clock,
 and used by i.MX8MP PCIe PHY driver later.

Although I have some confusions, it's better let's wating for the blk-ctrl
settle down and get clear discussion with Lucas later.
How do you think about that?

Best Regards
Richard Zhu
> 
> Best Regards,
> 
> Tim
> [1]
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> ork.kernel.org%2Fproject%2Flinux-arm-kernel%2Flist%2F%3Fseries%3D62958
> 6&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C19e85ae119bc47d3
> 397e08da18d71007%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7
> C637849609225124527%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sda
> ta=SUCCWtnCtTSCONfSoixOPgpMO4dnsBTW20x9qRdw4Fw%3D&amp;reserve
> d=0

Lucas Stach April 8, 2022, 8:12 a.m. UTC | #5

Am Freitag, dem 08.04.2022 um 03:14 +0000 schrieb Hongxing Zhu:
> > 
[...]
> > Richard,
> > 
> > Thanks for working on this!
> > 
> > Do you plan on submitting another version soon? I've tried to test this with an
> > imx8mp board I'm bringing up and while the host controller enumerates I fail
> > to get a link to a device. It's very likely I am missing something as this series
> > depends on the IMX8MP blk-ctrl and gpc series which I also can't cleanly apply.
> > Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl
> > series' [1] yet I can't find a repo/branch that applies to either.
> > 
> > Perhaps you have a git repo somewhere I can look at while we wait for
> > imx8mp blk-ctl/gpc to settle and you to submit a v3?
> Hi Tim:
> Thanks for your kindly help to do the tests.
> I had listed the dependencies in the cover-letter log.
> Alexander and I used to test this series commits based on the V5.17 kernel.
> 
> Lucas had provided some review comments and suggestions about the PLL bits
>  manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this series.
> And he suggested to let the HSIOMIX blk-ctrl make this PLL as a real clock,
>  and used by i.MX8MP PCIe PHY driver later.
> 
> Although I have some confusions, it's better let's wating for the blk-ctrl
> settle down and get clear discussion with Lucas later.
> How do you think about that?

Just to let you know my plans: I was quite busy with getting the
i.MX8MP HDMI part to work. Now that this is at least in a state where
it can collect some feedback from upstream I have some time to circle
back to this topic. I can't commit to do it immediately, but I'll get
around to looking at the PCIe series a bit more in-depth and apply my
HSIO PLL suggestion to the blk-ctrl driver during the next week.

Regards,
Lucas

Richard Zhu April 11, 2022, 3:32 a.m. UTC | #6

> -----Original Message-----
> From: Lucas Stach <[e-mail]>
> Sent: 2022年4月8日 16:13
> To: Hongxing Zhu <[e-mail]>; [e-mail];
> Alexander Stein <[e-mail]>
> Cc: Philipp Zabel <[e-mail]>; [e-mail]; Lorenzo
> Pieralisi <[e-mail]>; Rob Herring <[e-mail]>; Shawn
> Guo <[e-mail]>; Vinod Koul <[e-mail]>;
> [e-mail]; Device Tree Mailing List
> <[e-mail]>; [e-mail]; Linux ARM Mailing
> List <[e-mail]>; open list
> <[e-mail]>; Sascha Hauer <[e-mail]>;
> dl-linux-imx <[e-mail]>
> Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> 
> Am Freitag, dem 08.04.2022 um 03:14 +0000 schrieb Hongxing Zhu:
> > >
> [...]
> > > Richard,
> > >
> > > Thanks for working on this!
> > >
> > > Do you plan on submitting another version soon? I've tried to test
> > > this with an imx8mp board I'm bringing up and while the host
> > > controller enumerates I fail to get a link to a device. It's very
> > > likely I am missing something as this series depends on the IMX8MP blk-ctrl
> and gpc series which I also can't cleanly apply.
> > > Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI
> > > blk-ctrl series' [1] yet I can't find a repo/branch that applies to either.
> > >
> > > Perhaps you have a git repo somewhere I can look at while we wait
> > > for imx8mp blk-ctl/gpc to settle and you to submit a v3?
> > Hi Tim:
> > Thanks for your kindly help to do the tests.
> > I had listed the dependencies in the cover-letter log.
> > Alexander and I used to test this series commits based on the V5.17 kernel.
> >
> > Lucas had provided some review comments and suggestions about the PLL
> > bits
> >  manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this series.
> > And he suggested to let the HSIOMIX blk-ctrl make this PLL as a real
> > clock,
> >  and used by i.MX8MP PCIe PHY driver later.
> >
> > Although I have some confusions, it's better let's wating for the
> > blk-ctrl settle down and get clear discussion with Lucas later.
> > How do you think about that?
> 
> Just to let you know my plans: I was quite busy with getting the i.MX8MP
> HDMI part to work. Now that this is at least in a state where it can collect
> some feedback from upstream I have some time to circle back to this topic. I
> can't commit to do it immediately, but I'll get around to looking at the PCIe
> series a bit more in-depth and apply my HSIO PLL suggestion to the blk-ctrl
> driver during the next week.

Hi Lucas:
Thanks for your helpful reply.
I know that you're busy with the blk-ctrl settle down now, and had explained to
Tim.

Best Regards
Richard Zhu

> 
> Regards,
> Lucas

Tim Harvey April 11, 2022, 10:18 p.m. UTC | #7

On Thu, Apr 7, 2022 at 8:14 PM Hongxing Zhu <[e-mail]> wrote:
>
>
> > -----Original Message-----
> > From: Tim Harvey <[e-mail]>
> > Sent: 2022年4月8日 4:42
> > To: Hongxing Zhu <[e-mail]>; Lucas Stach
> > <[e-mail]>
> > Cc: Philipp Zabel <[e-mail]>; [e-mail]; Lorenzo
> > Pieralisi <[e-mail]>; Rob Herring <[e-mail]>; Shawn
> > Guo <[e-mail]>; Vinod Koul <[e-mail]>; Alexander Stein
> > <[e-mail]>; [e-mail]; Device
> > Tree Mailing List <[e-mail]>; [e-mail];
> > Linux ARM Mailing List <[e-mail]>; open list
> > <[e-mail]>; Sascha Hauer <[e-mail]>;
> > dl-linux-imx <[e-mail]>
> > Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> >
> > On Mon, Mar 7, 2022 at 1:18 AM Richard Zhu <[e-mail]>
> > wrote:
> > >
> > > Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and
> > > the following commits.
> > >   - one codes refine patch-set[5].
> > >   - two Fixes[2],[3].
> > >   - one binding commit[4].
> > >   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM
> > EVK.
> > >     b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on
> > imx8mm evk board
> > >     aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
> > >     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> > >
> > > Sorry about that there may be some conflictions when do the codes merge.
> > > I'm waiting for the ack now, and will re-base them in a proper sequence later.
> > >
> > > This series patches add the i.MX8MP PCIe support and tested on i.MX8MM
> > > EVK and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> > >
> > > - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
> > >   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> > > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> > >   And share as much as possible codes with i.MX8MM PCIe PHY.
> > > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> > >   driver.
> > >
> > > Main changes v1-->v2:
> > > - It's my fault forget including Vinod, re-send v2 after include Vinod
> > >   and [e-mail].
> > > - List the basements of this patch-set. The branch, codes changes and so on.
> > > - Clean up some useless register and bit definitions in #3 patch.
> > >
> > > [1]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >
> > atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F2022022820
> > 1
> > >
> > 731.3330192-1-l.stach%40pengutronix.de%2F&amp;data=04%7C01%7Chongx
> > ing.
> > >
> > zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> > 2b4c6fa92
> > >
> > cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> > pbGZsb3d8eyJ
> > >
> > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> > C3000
> > >
> > &amp;sdata=namjBp1ZpawS9s25%2FwS8aOnd2A7rHTK2rQRwG4V0Dt8%3D&
> > amp;reserv
> > > ed=0
> > > [2]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >
> > atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646289275-17813-
> > 1
> > >
> > -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> > ng.
> > >
> > zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> > 2b4c6fa92
> > >
> > cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> > pbGZsb3d8eyJ
> > >
> > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> > C3000
> > >
> > &amp;sdata=dWr1ui7eIc92iWzvo8VKPXTkNel3NR9yNxD5CyHIuV0%3D&amp;r
> > eserved
> > > =0
> > > [3]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >
> > atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1645672013-8949-1
> > -
> > >
> > git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> > ng.z
> > >
> > hu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc2
> > b4c6fa92c
> > >
> > d99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWFp
> > bGZsb3d8eyJW
> > >
> > IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> > 000&
> > >
> > amp;sdata=FCis4KE9KZqS8Ou6I0KTQu%2FayWSm%2Ftj%2Bcrd68EThsNs%3D
> > &amp;res
> > > erved=0
> > > [4]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >
> > atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646293805-18248-
> > 1
> > >
> > -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> > ng.
> > >
> > zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> > 2b4c6fa92
> > >
> > cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> > pbGZsb3d8eyJ
> > >
> > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> > C3000
> > >
> > &amp;sdata=sbYuLpfBFUImVi7YLe%2FCYvQNxleK2tnHKfr%2FByoAJsA%3D&am
> > p;rese
> > > rved=0
> > > [5]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> > >
> > atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fcover%2F1645760667-10510-
> > 1
> > >
> > -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> > ng.
> > >
> > zhu%40nxp.com%7C19e85ae119bc47d3397e08da18d71007%7C686ea1d3bc
> > 2b4c6fa92
> > >
> > cd99c5c301635%7C0%7C1%7C637849609225124527%7CUnknown%7CTWF
> > pbGZsb3d8eyJ
> > >
> > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> > C3000
> > >
> > &amp;sdata=tRZQBUN4CleGFFbxqNn4W1kUwCgATERggfa8qEQyc9E%3D&am
> > p;reserved
> > > =0
> > >
> > > NOTE:
> > > Based git
> > > <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> > > Based branch <pci/imx6>
> > >
> > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> > > arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55
> > ++++++++++++++++++++++
> > > arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46
> > ++++++++++++++++++-
> > > drivers/pci/controller/dwc/pci-imx6.c                        |  19
> > +++++++-
> > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++-----------------
> > > drivers/reset/reset-imx7.c                                   |   1 +
> > > 7 files changed, 286 insertions(+), 45 deletions(-)
> > >
> > > [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> > > [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v2
> > > 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY [PATCH v2 4/7]
> > > dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible [PATCH v2 5/7]
> > > arm64: dts: imx8mp: add the iMX8MP PCIe support [PATCH v2 6/7] arm64:
> > > dts: imx8mp-evk: Add PCIe support [PATCH v2 7/7] PCI: imx6: Add the
> > > iMX8MP PCIe support
> > >
> >
> > Richard,
> >
> > Thanks for working on this!
> >
> > Do you plan on submitting another version soon? I've tried to test this with an
> > imx8mp board I'm bringing up and while the host controller enumerates I fail
> > to get a link to a device. It's very likely I am missing something as this series
> > depends on the IMX8MP blk-ctrl and gpc series which I also can't cleanly apply.
> > Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl
> > series' [1] yet I can't find a repo/branch that applies to either.
> >

Richard,

I found that I had an issue with PERST# on my board which was causing
the link failure so I was able to get this series to work after
figuring out which patches were needed.

> > Perhaps you have a git repo somewhere I can look at while we wait for
> > imx8mp blk-ctl/gpc to settle and you to submit a v3?
> Hi Tim:
> Thanks for your kindly help to do the tests.
> I had listed the dependencies in the cover-letter log.
> Alexander and I used to test this series commits based on the V5.17 kernel.
>
> Lucas had provided some review comments and suggestions about the PLL bits
>  manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this series.
> And he suggested to let the HSIOMIX blk-ctrl make this PLL as a real clock,
>  and used by i.MX8MP PCIe PHY driver later.
>
> Although I have some confusions, it's better let's wating for the blk-ctrl
> settle down and get clear discussion with Lucas later.
> How do you think about that?
>

Yes, I agree.

Please Cc me on your next submission and I can test with the
imx8mp-venice-gw74xx board which uses an external REFCLK and does not
support CLKREQ.

Best Regards,

Tim

> Best Regards
> Richard Zhu
> >
> > Best Regards,
> >
> > Tim
> > [1]
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> > ork.kernel.org%2Fproject%2Flinux-arm-kernel%2Flist%2F%3Fseries%3D62958
> > 6&amp;data=04%7C01%7Chongxing.zhu%40nxp.com%7C19e85ae119bc47d3
> > 397e08da18d71007%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7
> > C637849609225124527%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> > MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sda
> > ta=SUCCWtnCtTSCONfSoixOPgpMO4dnsBTW20x9qRdw4Fw%3D&amp;reserve
> > d=0

Lucas Stach April 13, 2022, 7:21 a.m. UTC | #8

Hi Richard,

Am Montag, dem 11.04.2022 um 03:32 +0000 schrieb Hongxing Zhu:
> > -----Original Message-----
> > From: Lucas Stach <[e-mail]>
> > Sent: 2022年4月8日 16:13
> > To: Hongxing Zhu <[e-mail]>; [e-mail];
> > Alexander Stein <[e-mail]>
> > Cc: Philipp Zabel <[e-mail]>; [e-mail];
> > Lorenzo
> > Pieralisi <[e-mail]>; Rob Herring
> > <[e-mail]>; Shawn
> > Guo <[e-mail]>; Vinod Koul <[e-mail]>;
> > [e-mail]; Device Tree Mailing List
> > <[e-mail]>; [e-mail]; Linux ARM
> > Mailing
> > List <[e-mail]>; open list
> > <[e-mail]>; Sascha Hauer
> > <[e-mail]>;
> > dl-linux-imx <[e-mail]>
> > Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> > 
> > Am Freitag, dem 08.04.2022 um 03:14 +0000 schrieb Hongxing Zhu:
> > > > 
> > [...]
> > > > Richard,
> > > > 
> > > > Thanks for working on this!
> > > > 
> > > > Do you plan on submitting another version soon? I've tried to
> > > > test
> > > > this with an imx8mp board I'm bringing up and while the host
> > > > controller enumerates I fail to get a link to a device. It's
> > > > very
> > > > likely I am missing something as this series depends on the
> > > > IMX8MP blk-ctrl
> > and gpc series which I also can't cleanly apply.
> > > > Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI
> > > > blk-ctrl series' [1] yet I can't find a repo/branch that
> > > > applies to either.
> > > > 
> > > > Perhaps you have a git repo somewhere I can look at while we
> > > > wait
> > > > for imx8mp blk-ctl/gpc to settle and you to submit a v3?
> > > Hi Tim:
> > > Thanks for your kindly help to do the tests.
> > > I had listed the dependencies in the cover-letter log.
> > > Alexander and I used to test this series commits based on the
> > > V5.17 kernel.
> > > 
> > > Lucas had provided some review comments and suggestions about the
> > > PLL
> > > bits
> > >  manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this
> > > series.
> > > And he suggested to let the HSIOMIX blk-ctrl make this PLL as a
> > > real
> > > clock,
> > >  and used by i.MX8MP PCIe PHY driver later.
> > > 
> > > Although I have some confusions, it's better let's wating for the
> > > blk-ctrl settle down and get clear discussion with Lucas later.
> > > How do you think about that?
> > 
> > Just to let you know my plans: I was quite busy with getting the
> > i.MX8MP
> > HDMI part to work. Now that this is at least in a state where it
> > can collect
> > some feedback from upstream I have some time to circle back to this
> > topic. I
> > can't commit to do it immediately, but I'll get around to looking
> > at the PCIe
> > series a bit more in-depth and apply my HSIO PLL suggestion to the
> > blk-ctrl
> > driver during the next week.
> 
> Hi Lucas:
> Thanks for your helpful reply.
> I know that you're busy with the blk-ctrl settle down now, and had
> explained to
> Tim.

Yesterday I tried to get this series working on my 8MP-EVK board, but
was unsuccessful for now. The PCIe link does not come up. PCIe REF_CLK
is present and PERST de-asserted. I'm not sure if this is due to a
faulty EP device (I don't have another M.2 KeyE device around to check)
or if this may be due to the old revision of my 8MP-EVK, as I'm still
working with a RevA board. The schematic revision log doesn't show
anything that would obviously influence PCIe operation, but I have also
not found any schematics for RevA.

Do you know if there have been any PCIe related changes/fixes in the
later EVK board revisions?

For now I'll try to get this working on a custom i.MX8MP board, where I
can use a different EP device. Maybe I'll have a bit more luck there.

Regards,
Lucas

Richard Zhu April 13, 2022, 7:55 a.m. UTC | #9

> -----Original Message-----
> From: Lucas Stach <[e-mail]>
> Sent: 2022年4月13日 15:22
> To: Hongxing Zhu <[e-mail]>; [e-mail];
> Alexander Stein <[e-mail]>
> Cc: Philipp Zabel <[e-mail]>; [e-mail]; Lorenzo
> Pieralisi <[e-mail]>; Rob Herring <[e-mail]>; Shawn
> Guo <[e-mail]>; Vinod Koul <[e-mail]>;
> [e-mail]; Device Tree Mailing List
> <[e-mail]>; [e-mail]; Linux ARM Mailing
> List <[e-mail]>; open list
> <[e-mail]>; Sascha Hauer <[e-mail]>;
> dl-linux-imx <[e-mail]>
> Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> 
> Hi Richard,
> 
> Am Montag, dem 11.04.2022 um 03:32 +0000 schrieb Hongxing Zhu:
> > > -----Original Message-----
> > > From: Lucas Stach <[e-mail]>
> > > Sent: 2022年4月8日 16:13
> > > To: Hongxing Zhu <[e-mail]>; [e-mail];
> > > Alexander Stein <[e-mail]>
> > > Cc: Philipp Zabel <[e-mail]>; [e-mail];
> > > Lorenzo Pieralisi <[e-mail]>; Rob Herring
> > > <[e-mail]>; Shawn Guo <[e-mail]>; Vinod Koul
> > > <[e-mail]>; [e-mail]; Device Tree
> > > Mailing List <[e-mail]>;
> > > [e-mail]; Linux ARM Mailing List
> > > <[e-mail]>; open list
> > > <[e-mail]>; Sascha Hauer
> > > <[e-mail]>; dl-linux-imx <[e-mail]>
> > > Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> > >
> > > Am Freitag, dem 08.04.2022 um 03:14 +0000 schrieb Hongxing Zhu:
> > > > >
> > > [...]
> > > > > Richard,
> > > > >
> > > > > Thanks for working on this!
> > > > >
> > > > > Do you plan on submitting another version soon? I've tried to
> > > > > test this with an imx8mp board I'm bringing up and while the
> > > > > host controller enumerates I fail to get a link to a device.
> > > > > It's very likely I am missing something as this series depends
> > > > > on the IMX8MP blk-ctrl
> > > and gpc series which I also can't cleanly apply.
> > > > > Lucas just submitted a 'consolidated i.MX8MP HSIO/MEDIA/HDMI
> > > > > blk-ctrl series' [1] yet I can't find a repo/branch that applies
> > > > > to either.
> > > > >
> > > > > Perhaps you have a git repo somewhere I can look at while we
> > > > > wait for imx8mp blk-ctl/gpc to settle and you to submit a v3?
> > > > Hi Tim:
> > > > Thanks for your kindly help to do the tests.
> > > > I had listed the dependencies in the cover-letter log.
> > > > Alexander and I used to test this series commits based on the
> > > > V5.17 kernel.
> > > >
> > > > Lucas had provided some review comments and suggestions about the
> > > > PLL bits
> > > >  manipulations of HSIOMIX in i.MX8MP PCIe PHY driver #3 of this
> > > > series.
> > > > And he suggested to let the HSIOMIX blk-ctrl make this PLL as a
> > > > real clock,
> > > >  and used by i.MX8MP PCIe PHY driver later.
> > > >
> > > > Although I have some confusions, it's better let's wating for the
> > > > blk-ctrl settle down and get clear discussion with Lucas later.
> > > > How do you think about that?
> > >
> > > Just to let you know my plans: I was quite busy with getting the
> > > i.MX8MP HDMI part to work. Now that this is at least in a state
> > > where it can collect some feedback from upstream I have some time to
> > > circle back to this topic. I can't commit to do it immediately, but
> > > I'll get around to looking at the PCIe series a bit more in-depth
> > > and apply my HSIO PLL suggestion to the blk-ctrl driver during the
> > > next week.
> >
> > Hi Lucas:
> > Thanks for your helpful reply.
> > I know that you're busy with the blk-ctrl settle down now, and had
> > explained to Tim.
> 
> Yesterday I tried to get this series working on my 8MP-EVK board, but was
> unsuccessful for now. The PCIe link does not come up. PCIe REF_CLK is present
> and PERST de-asserted. I'm not sure if this is due to a faulty EP device (I don't
> have another M.2 KeyE device around to check) or if this may be due to the old
> revision of my 8MP-EVK, as I'm still working with a RevA board. The schematic
> revision log doesn't show anything that would obviously influence PCIe
> operation, but I have also not found any schematics for RevA.
> 
> Do you know if there have been any PCIe related changes/fixes in the later EVK
> board revisions?
> 
Hi Lucas:
First of all, thanks a lot for your kindly help on this series.
I remember that there is one PCIe related HW rework used to support the NVME
 device when Rev A board is used.
Here is description of this rework and hope it's helpful.

Support High power consumption NVMe SSD
Current EVK has limitation to support high power consumption NVMe SSD, transient
 voltage drop is high, need to change R452 to 0ohm to solve this issue.
Rework Steps:
Change R452  to 470-75394 0ohm, 0402

BTW, R452 is placed just at the right side of the M.2 slot.

Best Regards
Richard Zhu

> For now I'll try to get this working on a custom i.MX8MP board, where I can
> use a different EP device. Maybe I'll have a bit more luck there.
> 
> Regards,
> Lucas

Lucas Stach April 14, 2022, 8:45 p.m. UTC | #10

Hi Richard,

I didn't get around to see what's wrong with the PCIe on my EVK, so I
wasn't able to do any reworks to the series. As I will be on vacation
from tomorrow until Apr. 25th, I'll just leave some more comments on
this series for your consideration.

Regards,
Lucas

Am Montag, dem 07.03.2022 um 17:07 +0800 schrieb Richard Zhu:
> Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and the
> following commits.
>   - one codes refine patch-set[5].
>   - two Fixes[2],[3].
>   - one binding commit[4].
>   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM EVK.
>     b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board
>     aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
>     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> 
> Sorry about that there may be some conflictions when do the codes merge.
> I'm waiting for the ack now, and will re-base them in a proper sequence later.
> 
> This series patches add the i.MX8MP PCIe support and tested on i.MX8MM EVK and
> i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> 
> - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
>   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
>   And share as much as possible codes with i.MX8MM PCIe PHY.
> - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
>   driver.
> 
> Main changes v1-->v2:
> - It's my fault forget including Vinod, re-send v2 after include Vinod
>   and [e-mail].
> - List the basements of this patch-set. The branch, codes changes and so on.
> - Clean up some useless register and bit definitions in #3 patch.
> 
> [1]https://patchwork.kernel.org/project/linux-arm-kernel/cover/[e-mail]/
> [2]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [3]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [4]https://patchwork.ozlabs.org/project/linux-pci/patch/[e-mail]/
> [5]https://patchwork.ozlabs.org/project/linux-pci/cover/[e-mail]/
> 
> NOTE:
> Based git <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> Based branch <pci/imx6>
> 
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46 ++++++++++++++++++-
> drivers/pci/controller/dwc/pci-imx6.c                        |  19 +++++++-
> drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------
> drivers/reset/reset-imx7.c                                   |   1 +
> 7 files changed, 286 insertions(+), 45 deletions(-)
> 
> [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding
> [PATCH v2 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY
> [PATCH v2 4/7] dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible
> [PATCH v2 5/7] arm64: dts: imx8mp: add the iMX8MP PCIe support
> [PATCH v2 6/7] arm64: dts: imx8mp-evk: Add PCIe support
> [PATCH v2 7/7] PCI: imx6: Add the iMX8MP PCIe support

Richard Zhu April 18, 2022, 4:54 a.m. UTC | #11

> -----Original Message-----
> From: Lucas Stach <[e-mail]>
> Sent: 2022年4月15日 4:45
> To: Hongxing Zhu <[e-mail]>; [e-mail];
> [e-mail]; [e-mail]; [e-mail];
> [e-mail]; [e-mail]; [e-mail]
> Cc: [e-mail]; [e-mail];
> [e-mail]; [e-mail];
> [e-mail]; [e-mail]; dl-linux-imx
> <[e-mail]>
> Subject: Re: [PATCH v2 0/7] Add the iMX8MP PCIe support
> 
> Hi Richard,
> 
> I didn't get around to see what's wrong with the PCIe on my EVK, so I wasn't
> able to do any reworks to the series. As I will be on vacation from tomorrow
> until Apr. 25th, I'll just leave some more comments on this series for your
> consideration.
Hi Lucas:
Got that, thanks.
Have a good holiday.

Best Regards
Richard Zhu

> 
> Regards,
> Lucas
> 
> Am Montag, dem 07.03.2022 um 17:07 +0800 schrieb Richard Zhu:
> > Based on the i.MX8MP GPC and blk-ctrl patch-set[1] issued by Lucas and
> > the following commits.
> >   - one codes refine patch-set[5].
> >   - two Fixes[2],[3].
> >   - one binding commit[4].
> >   - some dts changes in Shawn's git if you want to test PCIe on i.MX8MM
> EVK.
> >     b4d36c10bf17 arm64: dts: imx8mm-evk: Add the pcie support on
> imx8mm evk board
> >     aaeba6a8e226 arm64: dts: imx8mm: Add the pcie support
> >     cfc5078432ca arm64: dts: imx8mm: Add the pcie phy support
> >
> > Sorry about that there may be some conflictions when do the codes merge.
> > I'm waiting for the ack now, and will re-base them in a proper sequence later.
> >
> > This series patches add the i.MX8MP PCIe support and tested on i.MX8MM
> > EVK and i.MX8MP EVk boards. The PCIe NVME works fine on both boards.
> >
> > - i.MX8MP PCIe PHY has two resets refer to the i.MX8MM PCIe PHY.
> >   Add one more PHY reset for i.MX8MP PCIe PHY accordingly.
> > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> >   And share as much as possible codes with i.MX8MM PCIe PHY.
> > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> >   driver.
> >
> > Main changes v1-->v2:
> > - It's my fault forget including Vinod, re-send v2 after include Vinod
> >   and [e-mail].
> > - List the basements of this patch-set. The branch, codes changes and so on.
> > - Clean up some useless register and bit definitions in #3 patch.
> >
> > [1]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F2022022820
> 1
> >
> 731.3330192-1-l.stach%40pengutronix.de%2F&amp;data=04%7C01%7Chongx
> ing.
> >
> zhu%40nxp.com%7C3e8710b45fcd4516145908da1e57ad9b%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637855659162145906%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=p758ZvzD9wSh23Bcz29e%2BbvVi6BfmvDqIgh4yzR3ACs%3D&am
> p;reserv
> > ed=0
> > [2]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646289275-17813-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C3e8710b45fcd4516145908da1e57ad9b%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637855659162145906%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=PKa0bhjfgg%2B74KtKYEtMLtar%2BMkw6od3IZkkjd5U6fM%3D&a
> mp;rese
> > rved=0
> > [3]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1645672013-8949-1
> -
> >
> git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.z
> >
> hu%40nxp.com%7C3e8710b45fcd4516145908da1e57ad9b%7C686ea1d3bc2
> b4c6fa92c
> >
> d99c5c301635%7C0%7C1%7C637855659162145906%7CUnknown%7CTWFp
> bGZsb3d8eyJW
> >
> IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> 000&
> >
> amp;sdata=wCnAZqH22CWRBc%2BNJOTdfFUEcGcb9JtziIVJsUMSXVc%3D&amp
> ;reserve
> > d=0
> > [4]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F1646293805-18248-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C3e8710b45fcd4516145908da1e57ad9b%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637855659162145906%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=U221NuIhee%2FF9Yf%2B28pFwVlg8fi3m694qbdfPZs%2BHEw%3
> D&amp;re
> > served=0
> > [5]https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fp
> >
> atchwork.ozlabs.org%2Fproject%2Flinux-pci%2Fcover%2F1645760667-10510-
> 1
> >
> -git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=04%7C01%7Chongxi
> ng.
> >
> zhu%40nxp.com%7C3e8710b45fcd4516145908da1e57ad9b%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637855659162145906%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C3000
> >
> &amp;sdata=9KHzoq6kMFAL%2FVnG6GMvY%2FdbfzaOlZf9y4Y%2FuVrEKV4%3
> D&amp;re
> > served=0
> >
> > NOTE:
> > Based git
> > <git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git>
> > Based branch <pci/imx6>
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |   1 +
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |   4 +-
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  55
> ++++++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  46
> ++++++++++++++++++-
> > drivers/pci/controller/dwc/pci-imx6.c                        |  19
> +++++++-
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   | 205
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++-----------------
> > drivers/reset/reset-imx7.c                                   |   1 +
> > 7 files changed, 286 insertions(+), 45 deletions(-)
> >
> > [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support
> > [PATCH v2 2/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v2
> > 3/7] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY [PATCH v2 4/7]
> > dt-bindings: imx6q-pcie: Add iMX8MP PCIe compatible [PATCH v2 5/7]
> > arm64: dts: imx8mp: add the iMX8MP PCIe support [PATCH v2 6/7] arm64:
> > dts: imx8mp-evk: Add PCIe support [PATCH v2 7/7] PCI: imx6: Add the
> > iMX8MP PCIe support
>