Message ID | 20220411043423.37333-5-samuel@sholland.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/sun4i: Allwinner D1 Display Engine 2.0 Support | expand |
Dne ponedeljek, 11. april 2022 ob 06:34:16 CEST je Samuel Holland napisal(a): > Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's > remove the dependency on a specific CPU architecture, so the driver can > be built wherever ARCH_SUNXI is selected. > > Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > --- > > drivers/gpu/drm/sun4i/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig > index befc5a80222d..3a43c436c74a 100644 > --- a/drivers/gpu/drm/sun4i/Kconfig > +++ b/drivers/gpu/drm/sun4i/Kconfig > @@ -1,7 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0-only > config DRM_SUN4I > tristate "DRM Support for Allwinner A10 Display Engine" > - depends on DRM && (ARM || ARM64) && COMMON_CLK > + depends on DRM && COMMON_CLK > depends on ARCH_SUNXI || COMPILE_TEST > select DRM_GEM_CMA_HELPER > select DRM_KMS_HELPER > -- > 2.35.1 > >
Hi Samuel, I love your patch! Yet something to improve: [auto build test ERROR on sunxi/sunxi/for-next] [also build test ERROR on drm/drm-next linus/master v5.18-rc2 next-20220411] [cannot apply to mripard/sunxi/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701 base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20220412/202204120528.TRFC7Ywj-lkp@intel.com/config) compiler: alpha-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701 git checkout 829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=alpha SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c: In function 'fifo_transfer': >> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:59:17: error: implicit declaration of function 'readsb'; did you mean 'readb'? [-Werror=implicit-function-declaration] 59 | readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); | ^~~~~~ | readb >> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:61:17: error: implicit declaration of function 'writesb'; did you mean 'writeb'? [-Werror=implicit-function-declaration] 61 | writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); | ^~~~~~~ | writeb cc1: some warnings being treated as errors vim +59 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c f0a3dd33ba685b Jonathan Liu 2017-07-02 24 f0a3dd33ba685b Jonathan Liu 2017-07-02 25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) f0a3dd33ba685b Jonathan Liu 2017-07-02 26 { f0a3dd33ba685b Jonathan Liu 2017-07-02 27 /* f0a3dd33ba685b Jonathan Liu 2017-07-02 28 * 1 byte takes 9 clock cycles (8 bits + 1 ACK) = 90 us for 100 kHz f0a3dd33ba685b Jonathan Liu 2017-07-02 29 * clock. As clock rate is fixed, just round it up to 100 us. f0a3dd33ba685b Jonathan Liu 2017-07-02 30 */ f0a3dd33ba685b Jonathan Liu 2017-07-02 31 const unsigned long byte_time_ns = 100; f0a3dd33ba685b Jonathan Liu 2017-07-02 32 const u32 mask = SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK | f0a3dd33ba685b Jonathan Liu 2017-07-02 33 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST | f0a3dd33ba685b Jonathan Liu 2017-07-02 34 SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETE; f0a3dd33ba685b Jonathan Liu 2017-07-02 35 u32 reg; 939d749ad6649c Chen-Yu Tsai 2017-10-10 36 /* 939d749ad6649c Chen-Yu Tsai 2017-10-10 37 * If threshold is inclusive, then the FIFO may only have 939d749ad6649c Chen-Yu Tsai 2017-10-10 38 * RX_THRESHOLD number of bytes, instead of RX_THRESHOLD + 1. 939d749ad6649c Chen-Yu Tsai 2017-10-10 39 */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 40 int read_len = RX_THRESHOLD + 939d749ad6649c Chen-Yu Tsai 2017-10-10 41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); f0a3dd33ba685b Jonathan Liu 2017-07-02 42 939d749ad6649c Chen-Yu Tsai 2017-10-10 43 /* 939d749ad6649c Chen-Yu Tsai 2017-10-10 44 * Limit transfer length by FIFO threshold or FIFO size. 939d749ad6649c Chen-Yu Tsai 2017-10-10 45 * For TX the threshold is for an empty FIFO. 939d749ad6649c Chen-Yu Tsai 2017-10-10 46 */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 47 len = min_t(int, len, read ? read_len : SUN4I_HDMI_DDC_FIFO_SIZE); f0a3dd33ba685b Jonathan Liu 2017-07-02 48 f0a3dd33ba685b Jonathan Liu 2017-07-02 49 /* Wait until error, FIFO request bit set or transfer complete */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, 939d749ad6649c Chen-Yu Tsai 2017-10-10 51 reg & mask, len * byte_time_ns, 939d749ad6649c Chen-Yu Tsai 2017-10-10 52 100000)) f0a3dd33ba685b Jonathan Liu 2017-07-02 53 return -ETIMEDOUT; f0a3dd33ba685b Jonathan Liu 2017-07-02 54 f0a3dd33ba685b Jonathan Liu 2017-07-02 55 if (reg & SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK) f0a3dd33ba685b Jonathan Liu 2017-07-02 56 return -EIO; f0a3dd33ba685b Jonathan Liu 2017-07-02 57 f0a3dd33ba685b Jonathan Liu 2017-07-02 58 if (read) 939d749ad6649c Chen-Yu Tsai 2017-10-10 @59 readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); f0a3dd33ba685b Jonathan Liu 2017-07-02 60 else 939d749ad6649c Chen-Yu Tsai 2017-10-10 @61 writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); f0a3dd33ba685b Jonathan Liu 2017-07-02 62 939d749ad6649c Chen-Yu Tsai 2017-10-10 63 /* Clear FIFO request bit by forcing a write to that bit */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 64 regmap_field_force_write(hdmi->field_ddc_int_status, 939d749ad6649c Chen-Yu Tsai 2017-10-10 65 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST); f0a3dd33ba685b Jonathan Liu 2017-07-02 66 f0a3dd33ba685b Jonathan Liu 2017-07-02 67 return len; f0a3dd33ba685b Jonathan Liu 2017-07-02 68 } f0a3dd33ba685b Jonathan Liu 2017-07-02 69
Hi Samuel, I love your patch! Yet something to improve: [auto build test ERROR on sunxi/sunxi/for-next] [also build test ERROR on drm/drm-next linus/master v5.18-rc2 next-20220412] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701 base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git sunxi/for-next config: hexagon-allyesconfig (https://download.01.org/0day-ci/archive/20220412/202204121758.QeUxJKUh-lkp@intel.com/config) compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project c6e83f560f06cdfe8aa47b248d8bdc58f947274b) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Samuel-Holland/drm-sun4i-Allwinner-D1-Display-Engine-2-0-Support/20220411-123701 git checkout 829dac8ee2cbb6d1b7bda1c513cc2ad1939fca53 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): >> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:59:3: error: implicit declaration of function 'readsb' is invalid in C99 [-Werror,-Wimplicit-function-declaration] readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); ^ drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:59:3: note: did you mean 'readb'? arch/hexagon/include/asm/io.h:83:18: note: 'readb' declared here static inline u8 readb(const volatile void __iomem *addr) ^ >> drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:61:3: error: implicit declaration of function 'writesb' is invalid in C99 [-Werror,-Wimplicit-function-declaration] writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); ^ drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c:61:3: note: did you mean 'writeb'? arch/hexagon/include/asm/io.h:122:20: note: 'writeb' declared here static inline void writeb(u8 data, volatile void __iomem *addr) ^ 2 errors generated. vim +/readsb +59 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c f0a3dd33ba685b Jonathan Liu 2017-07-02 24 f0a3dd33ba685b Jonathan Liu 2017-07-02 25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) f0a3dd33ba685b Jonathan Liu 2017-07-02 26 { f0a3dd33ba685b Jonathan Liu 2017-07-02 27 /* f0a3dd33ba685b Jonathan Liu 2017-07-02 28 * 1 byte takes 9 clock cycles (8 bits + 1 ACK) = 90 us for 100 kHz f0a3dd33ba685b Jonathan Liu 2017-07-02 29 * clock. As clock rate is fixed, just round it up to 100 us. f0a3dd33ba685b Jonathan Liu 2017-07-02 30 */ f0a3dd33ba685b Jonathan Liu 2017-07-02 31 const unsigned long byte_time_ns = 100; f0a3dd33ba685b Jonathan Liu 2017-07-02 32 const u32 mask = SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK | f0a3dd33ba685b Jonathan Liu 2017-07-02 33 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST | f0a3dd33ba685b Jonathan Liu 2017-07-02 34 SUN4I_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETE; f0a3dd33ba685b Jonathan Liu 2017-07-02 35 u32 reg; 939d749ad6649c Chen-Yu Tsai 2017-10-10 36 /* 939d749ad6649c Chen-Yu Tsai 2017-10-10 37 * If threshold is inclusive, then the FIFO may only have 939d749ad6649c Chen-Yu Tsai 2017-10-10 38 * RX_THRESHOLD number of bytes, instead of RX_THRESHOLD + 1. 939d749ad6649c Chen-Yu Tsai 2017-10-10 39 */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 40 int read_len = RX_THRESHOLD + 939d749ad6649c Chen-Yu Tsai 2017-10-10 41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); f0a3dd33ba685b Jonathan Liu 2017-07-02 42 939d749ad6649c Chen-Yu Tsai 2017-10-10 43 /* 939d749ad6649c Chen-Yu Tsai 2017-10-10 44 * Limit transfer length by FIFO threshold or FIFO size. 939d749ad6649c Chen-Yu Tsai 2017-10-10 45 * For TX the threshold is for an empty FIFO. 939d749ad6649c Chen-Yu Tsai 2017-10-10 46 */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 47 len = min_t(int, len, read ? read_len : SUN4I_HDMI_DDC_FIFO_SIZE); f0a3dd33ba685b Jonathan Liu 2017-07-02 48 f0a3dd33ba685b Jonathan Liu 2017-07-02 49 /* Wait until error, FIFO request bit set or transfer complete */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, 939d749ad6649c Chen-Yu Tsai 2017-10-10 51 reg & mask, len * byte_time_ns, 939d749ad6649c Chen-Yu Tsai 2017-10-10 52 100000)) f0a3dd33ba685b Jonathan Liu 2017-07-02 53 return -ETIMEDOUT; f0a3dd33ba685b Jonathan Liu 2017-07-02 54 f0a3dd33ba685b Jonathan Liu 2017-07-02 55 if (reg & SUN4I_HDMI_DDC_INT_STATUS_ERROR_MASK) f0a3dd33ba685b Jonathan Liu 2017-07-02 56 return -EIO; f0a3dd33ba685b Jonathan Liu 2017-07-02 57 f0a3dd33ba685b Jonathan Liu 2017-07-02 58 if (read) 939d749ad6649c Chen-Yu Tsai 2017-10-10 @59 readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); f0a3dd33ba685b Jonathan Liu 2017-07-02 60 else 939d749ad6649c Chen-Yu Tsai 2017-10-10 @61 writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); f0a3dd33ba685b Jonathan Liu 2017-07-02 62 939d749ad6649c Chen-Yu Tsai 2017-10-10 63 /* Clear FIFO request bit by forcing a write to that bit */ 939d749ad6649c Chen-Yu Tsai 2017-10-10 64 regmap_field_force_write(hdmi->field_ddc_int_status, 939d749ad6649c Chen-Yu Tsai 2017-10-10 65 SUN4I_HDMI_DDC_INT_STATUS_FIFO_REQUEST); f0a3dd33ba685b Jonathan Liu 2017-07-02 66 f0a3dd33ba685b Jonathan Liu 2017-07-02 67 return len; f0a3dd33ba685b Jonathan Liu 2017-07-02 68 } f0a3dd33ba685b Jonathan Liu 2017-07-02 69
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig index befc5a80222d..3a43c436c74a 100644 --- a/drivers/gpu/drm/sun4i/Kconfig +++ b/drivers/gpu/drm/sun4i/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config DRM_SUN4I tristate "DRM Support for Allwinner A10 Display Engine" - depends on DRM && (ARM || ARM64) && COMMON_CLK + depends on DRM && COMMON_CLK depends on ARCH_SUNXI || COMPILE_TEST select DRM_GEM_CMA_HELPER select DRM_KMS_HELPER
Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's remove the dependency on a specific CPU architecture, so the driver can be built wherever ARCH_SUNXI is selected. Signed-off-by: Samuel Holland <samuel@sholland.org> --- drivers/gpu/drm/sun4i/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)