| Message ID | 20220409211215.2529387-2-dfustini@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | soc: ti: wkup_m3_ipc: support vtt toggle | expand |
On 09/04/2022 23:12, Drew Fustini wrote: > Document Wakeup M3 IPC property that indicates a GPIO pin is connected > to the enable pin on DDR VTT regulator and can be toggled during low > power mode transitions. > > Signed-off-by: Dave Gerlach <d-gerlach@ti.com> > [dfustini: converted to YAML, removed unnecessary "ti,needs-vtt-toggle"] > Signed-off-by: Drew Fustini <dfustini@baylibre.com> > --- > .../devicetree/bindings/soc/ti/wkup-m3-ipc.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On Sat, Apr 09, 2022 at 02:12:14PM -0700, Drew Fustini wrote: > Document Wakeup M3 IPC property that indicates a GPIO pin is connected > to the enable pin on DDR VTT regulator and can be toggled during low > power mode transitions. > > Signed-off-by: Dave Gerlach <d-gerlach@ti.com> > [dfustini: converted to YAML, removed unnecessary "ti,needs-vtt-toggle"] > Signed-off-by: Drew Fustini <dfustini@baylibre.com> > --- > .../devicetree/bindings/soc/ti/wkup-m3-ipc.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > index d855c01ce61c..7f4a75c5fcaa 100644 > --- a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > +++ b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > @@ -24,6 +24,14 @@ description: |+ > A wkup_m3_ipc device node is used to represent the IPC registers within an > SoC. > > + Support for VTT Toggle > + ================================== > + On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is > + connected to the enable pin on the DDR VTT regulator. This allows the > + regulator to be disabled upon suspend and enabled upon resume. Please note > + that the GPIO pin must be part of the GPIO0 module as only this GPIO module > + is in the wakeup power domain. > + > properties: > compatible: > enum: > @@ -51,6 +59,10 @@ properties: > mbox_wkupm3 child node. > maxItems: 1 > > + ti,vtt-gpio-pin: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: GPIO pin connected to enable pin on VTT regulator Looking at the driver, can't you add 'maximum: 31' here? If so, I can add it when applying. Rob
On Tue, Apr 12, 2022 at 02:54:27PM -0500, Rob Herring wrote: > On Sat, Apr 09, 2022 at 02:12:14PM -0700, Drew Fustini wrote: > > Document Wakeup M3 IPC property that indicates a GPIO pin is connected > > to the enable pin on DDR VTT regulator and can be toggled during low > > power mode transitions. > > > > Signed-off-by: Dave Gerlach <d-gerlach@ti.com> > > [dfustini: converted to YAML, removed unnecessary "ti,needs-vtt-toggle"] > > Signed-off-by: Drew Fustini <dfustini@baylibre.com> > > --- > > .../devicetree/bindings/soc/ti/wkup-m3-ipc.yaml | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > > index d855c01ce61c..7f4a75c5fcaa 100644 > > --- a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > > +++ b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml > > @@ -24,6 +24,14 @@ description: |+ > > A wkup_m3_ipc device node is used to represent the IPC registers within an > > SoC. > > > > + Support for VTT Toggle > > + ================================== > > + On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is > > + connected to the enable pin on the DDR VTT regulator. This allows the > > + regulator to be disabled upon suspend and enabled upon resume. Please note > > + that the GPIO pin must be part of the GPIO0 module as only this GPIO module > > + is in the wakeup power domain. > > + > > properties: > > compatible: > > enum: > > @@ -51,6 +59,10 @@ properties: > > mbox_wkupm3 child node. > > maxItems: 1 > > > > + ti,vtt-gpio-pin: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: GPIO pin connected to enable pin on VTT regulator > > Looking at the driver, can't you add 'maximum: 31' here? If so, I can > add it when applying. Yes, good idea. I would appreciate it if that was added when applying. Thank you, Drew
On Sat, 09 Apr 2022 14:12:14 -0700, Drew Fustini wrote: > Document Wakeup M3 IPC property that indicates a GPIO pin is connected > to the enable pin on DDR VTT regulator and can be toggled during low > power mode transitions. > > Signed-off-by: Dave Gerlach <d-gerlach@ti.com> > [dfustini: converted to YAML, removed unnecessary "ti,needs-vtt-toggle"] > Signed-off-by: Drew Fustini <dfustini@baylibre.com> > --- > .../devicetree/bindings/soc/ti/wkup-m3-ipc.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > Applied, thanks!
diff --git a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml index d855c01ce61c..7f4a75c5fcaa 100644 --- a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml +++ b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml @@ -24,6 +24,14 @@ description: |+ A wkup_m3_ipc device node is used to represent the IPC registers within an SoC. + Support for VTT Toggle + ================================== + On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is + connected to the enable pin on the DDR VTT regulator. This allows the + regulator to be disabled upon suspend and enabled upon resume. Please note + that the GPIO pin must be part of the GPIO0 module as only this GPIO module + is in the wakeup power domain. + properties: compatible: enum: @@ -51,6 +59,10 @@ properties: mbox_wkupm3 child node. maxItems: 1 + ti,vtt-gpio-pin: + $ref: /schemas/types.yaml#/definitions/uint32 + description: GPIO pin connected to enable pin on VTT regulator + required: - compatible - reg @@ -76,6 +88,7 @@ examples: interrupts = <78>; ti,rproc = <&wkup_m3>; mboxes = <&mailbox &mbox_wkupm3>; + ti,vtt-gpio-pin = <7>; }; }; ...