| Message ID | 20220413060729.27639-12-arinc.unal@arinc9.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Refactor Ralink Pinctrl and Add Documentation | expand |
On 13/04/2022 08:07, Arınç ÜNAL wrote: > Add binding for the Ralink MT7620 pin controller for MT7620, MT7628 and > MT7688 SoCs. > > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> > --- > .../pinctrl/ralink,mt7620-pinctrl.yaml | 87 +++++++++++++++++++ > 1 file changed, 87 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml > new file mode 100644 > index 000000000000..01578b8aa277 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml > @@ -0,0 +1,87 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Ralink MT7620 Pin Controller > + > +maintainers: > + - Arınç ÜNAL <arinc.unal@arinc9.com> > + - Sergio Paracuellos <sergio.paracuellos@gmail.com> > + > +description: > + Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. > + The pin controller can only set the muxing of pin groups. Muxing indiviual pins Run spellcheck on original bindings, don't copy same typos. > + is not supported. There is no pinconf support. > + > +properties: > + compatible: > + const: ralink,mt7620-pinctrl > + > +patternProperties: > + '-pins$': > + type: object > + patternProperties: > + '^(.*-)?pinmux$': Why do you have two levels here? pins->pinmux->actual pin configuration? Cannot be something like brcm,bcm636x has? > + type: object > + description: node for pinctrl. > + $ref: pinmux-node.yaml# > + > + properties: > + groups: > + description: The pin group to select. I wonder where do you configure particular pins because these are groups... It's a bit confusing to configure "i2c" group into "i2c" - looks obvious. > + enum: [ > + # For MT7620 SoC > + ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi, spi refclk, uartf, uartlite, wdt, wled, > + > + # For MT7628 and MT7688 SoCs > + gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, > + p3led_kn, p4led_an, p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi, spi cs1, spis, uart0, > + uart1, uart2, wdt, wled_an, wled_kn, > + ] > + > + function: > + description: The mux function to select. > + enum: [ > + # For MT7620 SoC > + ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa, pcie refclk, pcie rst, > + pcm gpio, pcm i2s, pcm uartf, refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, > + wdt refclk, wdt rst, wled, > + > + # For MT7628 and MT7688 SoCs > + antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, > + p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, > + pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1, spis, sw_r, uart0, > + uart1, uart2, utif, wdt, wled_an, wled_kn, -, All these lines do not fit in 80-character limit. Linux coding style still expects this in most of cases. > + ] > + Best regards, Krzysztof
On 13/04/2022 18:37, Krzysztof Kozlowski wrote: > On 13/04/2022 08:07, Arınç ÜNAL wrote: >> Add binding for the Ralink MT7620 pin controller for MT7620, MT7628 and >> MT7688 SoCs. >> >> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> >> --- >> .../pinctrl/ralink,mt7620-pinctrl.yaml | 87 +++++++++++++++++++ >> 1 file changed, 87 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml >> >> diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml >> new file mode 100644 >> index 000000000000..01578b8aa277 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml >> @@ -0,0 +1,87 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Ralink MT7620 Pin Controller >> + >> +maintainers: >> + - Arınç ÜNAL <arinc.unal@arinc9.com> >> + - Sergio Paracuellos <sergio.paracuellos@gmail.com> >> + >> +description: >> + Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. >> + The pin controller can only set the muxing of pin groups. Muxing indiviual pins > > Run spellcheck on original bindings, don't copy same typos. Will address, thanks! > >> + is not supported. There is no pinconf support. >> + >> +properties: >> + compatible: >> + const: ralink,mt7620-pinctrl >> + >> +patternProperties: >> + '-pins$': >> + type: object >> + patternProperties: >> + '^(.*-)?pinmux$': > > Why do you have two levels here? pins->pinmux->actual pin configuration? Yes, pins->pinmux->pin-configuration is currently how it's done. > Cannot be something like brcm,bcm636x has? Dunno, I'll take a look. > >> + type: object >> + description: node for pinctrl. >> + $ref: pinmux-node.yaml# >> + >> + properties: >> + groups: >> + description: The pin group to select. > > I wonder where do you configure particular pins because these are > groups... It's a bit confusing to configure "i2c" group into "i2c" - > looks obvious. We don't configure each pin particularly. Ralink driver only supports muxing certain functions for certain pin groups as hinted on the binding description. > >> + enum: [ >> + # For MT7620 SoC >> + ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi, spi refclk, uartf, uartlite, wdt, wled, >> + >> + # For MT7628 and MT7688 SoCs >> + gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, >> + p3led_kn, p4led_an, p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi, spi cs1, spis, uart0, >> + uart1, uart2, wdt, wled_an, wled_kn, >> + ] >> + >> + function: >> + description: The mux function to select. >> + enum: [ >> + # For MT7620 SoC >> + ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa, pcie refclk, pcie rst, >> + pcm gpio, pcm i2s, pcm uartf, refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, >> + wdt refclk, wdt rst, wled, >> + >> + # For MT7628 and MT7688 SoCs >> + antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, >> + p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, >> + pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1, spis, sw_r, uart0, >> + uart1, uart2, utif, wdt, wled_an, wled_kn, -, > > All these lines do not fit in 80-character limit. Linux coding style > still expects this in most of cases. Ok, dt_binding_check warns after 110 characters so I made it fit that. I'll update to 80. Arınç
On 14/04/2022 03:52, Arınç ÜNAL wrote: >> >>> + is not supported. There is no pinconf support. >>> + >>> +properties: >>> + compatible: >>> + const: ralink,mt7620-pinctrl >>> + >>> +patternProperties: >>> + '-pins$': >>> + type: object >>> + patternProperties: >>> + '^(.*-)?pinmux$': >> >> Why do you have two levels here? pins->pinmux->actual pin configuration? > > Yes, pins->pinmux->pin-configuration is currently how it's done. It is currently done? Aren't you bringing here new bindings and new driver support? Best regards, Krzysztof
On 14/04/2022 09:33, Krzysztof Kozlowski wrote: > On 14/04/2022 03:52, Arınç ÜNAL wrote: >>> >>>> + is not supported. There is no pinconf support. >>>> + >>>> +properties: >>>> + compatible: >>>> + const: ralink,mt7620-pinctrl >>>> + >>>> +patternProperties: >>>> + '-pins$': >>>> + type: object >>>> + patternProperties: >>>> + '^(.*-)?pinmux$': >>> >>> Why do you have two levels here? pins->pinmux->actual pin configuration? >> >> Yes, pins->pinmux->pin-configuration is currently how it's done. > > It is currently done? Aren't you bringing here new bindings and new > driver support? I'm submitting bindings for the existing subdrivers. There's nothing new but refactoring and submitting the missing bindings. Cheers. Arınç
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml new file mode 100644 index 000000000000..01578b8aa277 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ralink MT7620 Pin Controller + +maintainers: + - Arınç ÜNAL <arinc.unal@arinc9.com> + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +description: + Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. + The pin controller can only set the muxing of pin groups. Muxing indiviual pins + is not supported. There is no pinconf support. + +properties: + compatible: + const: ralink,mt7620-pinctrl + +patternProperties: + '-pins$': + type: object + patternProperties: + '^(.*-)?pinmux$': + type: object + description: node for pinctrl. + $ref: pinmux-node.yaml# + + properties: + groups: + description: The pin group to select. + enum: [ + # For MT7620 SoC + ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi, spi refclk, uartf, uartlite, wdt, wled, + + # For MT7628 and MT7688 SoCs + gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, + p3led_kn, p4led_an, p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi, spi cs1, spis, uart0, + uart1, uart2, wdt, wled_an, wled_kn, + ] + + function: + description: The mux function to select. + enum: [ + # For MT7620 SoC + ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa, pcie refclk, pcie rst, + pcm gpio, pcm i2s, pcm uartf, refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, + wdt refclk, wdt rst, wled, + + # For MT7628 and MT7688 SoCs + antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an, + p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, + pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1, spis, sw_r, uart0, + uart1, uart2, utif, wdt, wled_an, wled_kn, -, + ] + + required: + - groups + - function + + additionalProperties: false + + additionalProperties: false + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + +additionalProperties: false + +examples: + # Pinmux controller node + - | + pinctrl { + compatible = "ralink,mt7620-pinctrl"; + + i2c_pins: i2c0-pins { + pinmux { + groups = "i2c"; + function = "i2c"; + }; + }; + };
Add binding for the Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> --- .../pinctrl/ralink,mt7620-pinctrl.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml