| Message ID | 20220316131000.9874-13-gabriel.fernandez@foss.st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduction of STM32MP13 RCC driver (Reset Clock Controller) | expand |
Hi Gabriel On 3/16/22 14:09, gabriel.fernandez@foss.st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > > Enable optee and SCMI clocks support. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > --- > arch/arm/boot/dts/stm32mp131.dtsi | 37 +++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index 262de4eeb4ed..78eac53224d4 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -27,6 +27,43 @@ arm-pmu { > interrupt-parent = <&intc>; > }; > > + scmi_sram: sram@2ffff000 { > + compatible = "mmio-sram"; > + reg = <0x2ffff000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x2ffff000 0x1000>; > + > + scmi_shm: scmi_shm@0 { rename to scmi-sram@0 to match with yaml description > + compatible = "arm,scmi-shmem"; > + reg = <0 0x80>; > + }; > + }; Can you move this sram node in Soc{ please? > + > + firmware { > + optee { > + method = "smc"; > + compatible = "linaro,optee-tz"; > + }; > + > + scmi: scmi { > + compatible = "linaro,scmi-optee"; > + #address-cells = <1>; > + #size-cells = <0>; > + linaro,optee-channel-id = <0>; > + shmem = <&scmi_shm>; > + > + scmi_clk: protocol@14 { > + reg = <0x14>; > + #clock-cells = <1>; > + }; > + > + scmi_reset: protocol@16 { > + reg = <0x16>; > + #reset-cells = <1>; > + }; > + }; > + }; > clocks { > clk_axi: clk-axi { > #clock-cells = <0>;
On 4/21/22 17:23, Alexandre TORGUE wrote: > Hi Gabriel > > On 3/16/22 14:09, gabriel.fernandez@foss.st.com wrote: >> From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> >> >> Enable optee and SCMI clocks support. >> >> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> >> --- >> arch/arm/boot/dts/stm32mp131.dtsi | 37 +++++++++++++++++++++++++++++++ >> 1 file changed, 37 insertions(+) >> >> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi >> b/arch/arm/boot/dts/stm32mp131.dtsi >> index 262de4eeb4ed..78eac53224d4 100644 >> --- a/arch/arm/boot/dts/stm32mp131.dtsi >> +++ b/arch/arm/boot/dts/stm32mp131.dtsi >> @@ -27,6 +27,43 @@ arm-pmu { >> interrupt-parent = <&intc>; >> }; >> + scmi_sram: sram@2ffff000 { >> + compatible = "mmio-sram"; >> + reg = <0x2ffff000 0x1000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0 0x2ffff000 0x1000>; >> + >> + scmi_shm: scmi_shm@0 { > > rename to scmi-sram@0 to match with yaml description ok > >> + compatible = "arm,scmi-shmem"; >> + reg = <0 0x80>; >> + }; >> + }; > > Can you move this sram node in Soc{ please? ok Thank's Alex > >> + >> + firmware { >> + optee { >> + method = "smc"; >> + compatible = "linaro,optee-tz"; >> + }; >> + >> + scmi: scmi { >> + compatible = "linaro,scmi-optee"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + linaro,optee-channel-id = <0>; >> + shmem = <&scmi_shm>; >> + >> + scmi_clk: protocol@14 { >> + reg = <0x14>; >> + #clock-cells = <1>; >> + }; >> + >> + scmi_reset: protocol@16 { >> + reg = <0x16>; >> + #reset-cells = <1>; >> + }; >> + }; >> + }; >> clocks { >> clk_axi: clk-axi { >> #clock-cells = <0>; >
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index 262de4eeb4ed..78eac53224d4 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -27,6 +27,43 @@ arm-pmu { interrupt-parent = <&intc>; }; + scmi_sram: sram@2ffff000 { + compatible = "mmio-sram"; + reg = <0x2ffff000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x2ffff000 0x1000>; + + scmi_shm: scmi_shm@0 { + compatible = "arm,scmi-shmem"; + reg = <0 0x80>; + }; + }; + + firmware { + optee { + method = "smc"; + compatible = "linaro,optee-tz"; + }; + + scmi: scmi { + compatible = "linaro,scmi-optee"; + #address-cells = <1>; + #size-cells = <0>; + linaro,optee-channel-id = <0>; + shmem = <&scmi_shm>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + }; + }; clocks { clk_axi: clk-axi { #clock-cells = <0>;