Message ID | 20220426132139.26761-10-linux@fw-web.de |
---|---|
State | Superseded |
Headers | show |
Series | RK3568 PCIe V3 support | expand |
On Tue, Apr 26, 2022 at 03:21:37PM +0200, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Create new property for (rockchip) PCIe controller binding to > define lane mapping. > > Rockchip driver uses this for bifurcation (true/false) based > on lanes should be splitted across controllers or not. > > On rk3568 there are 2 PCIe Controllers which share 2 PCIe lanes. > > pcie3x1: pcie@fe270000 //lane1 when using 1+1 > pcie3x2: pcie@fe280000 //lane0 when using 1+1 > > This ends up in one Controller (pcie3x1) uses lane-map = <0 1>; and > the other lane-map = <1 0>; (pcie3x2) > > This means there are 2 lanes (count of numbers), one (by position) > is mapped to the first controller, the other one is used on the other > controller. > > In rockchip PCIe driver the lane-map is simply converted to the > bifurcation bool instead of direct mapping a specific lane to a > controller. > > There is not yet any slot mapping below one controller. > But for binding this may be possible like: > > lane-map = <1 2 3 3 4 4 4 4>; > | | | ... > lane0 | | > lane1 | > lane2 > > on a 8-lane phy. > > This can map lane0 to port1 (number used at this position), > lane1 to port2, lanes 2+3 to port 3 and lanes 4,5,6,7 to port 4. > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > v2: > - new patch > --- > Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > index a992970e8b85..998b20b3a9dc 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > @@ -52,6 +52,8 @@ properties: > - const: pclk > - const: aux > > + lane-map: true > + > msi-map: true > > num-lanes: true > @@ -74,8 +76,6 @@ properties: > reset-names: > const: pipe > > - bifurcation: true > - Why are you adding "bifurcation" earlier in the series, then immediately removing it? Why not just add "lane-map" directly and never mention "bifurcation" in the DT at all? > vpcie3v3-supply: true > > required: > @@ -115,6 +115,7 @@ examples: > "aclk_dbi", "pclk", > "aux"; > device_type = "pci"; > + lane-map = <0 1>; > linux,pci-domain = <2>; > max-link-speed = <2>; > msi-map = <0x2000 &its 0x2000 0x1000>; > -- > 2.25.1 > > > -- > linux-phy mailing list > linux-phy@lists.infradead.org > https://lists.infradead.org/mailman/listinfo/linux-phy
Hi, > Gesendet: Dienstag, 26. April 2022 um 18:04 Uhr > Von: "Bjorn Helgaas" <helgaas@kernel.org> > > - bifurcation: true > > - > > Why are you adding "bifurcation" earlier in the series, then > immediately removing it? Why not just add "lane-map" directly and > never mention "bifurcation" in the DT at all? The original driver used the bifurcation property with vendor prefix which i have dropped. In v1 there was an Idea to replace this bifurcation setting by something more generic supporting more that just true/false. So i added lane-map to start discussion if this is the right way or if i should leave the bifurcation property. if the lane-map is right, i squash the commits before the commits should land in linux... this is one cause i tagged the series as RFC. regards Frank
diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index a992970e8b85..998b20b3a9dc 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -52,6 +52,8 @@ properties: - const: pclk - const: aux + lane-map: true + msi-map: true num-lanes: true @@ -74,8 +76,6 @@ properties: reset-names: const: pipe - bifurcation: true - vpcie3v3-supply: true required: @@ -115,6 +115,7 @@ examples: "aclk_dbi", "pclk", "aux"; device_type = "pci"; + lane-map = <0 1>; linux,pci-domain = <2>; max-link-speed = <2>; msi-map = <0x2000 &its 0x2000 0x1000>;