diff mbox series

[v8,5/5] media: renesas: vsp1: Add support for RZ/G2L VSPD

Message ID 20220419181757.63346-6-biju.das.jz@bp.renesas.com (mailing list archive)
State New, archived
Headers show
Series Add support for RZ/G2L VSPD | expand

Commit Message

Biju Das April 19, 2022, 6:17 p.m. UTC 
The RZ/G2L VSPD provides a single VSPD instance. It has the following
sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.

The VSPD block on RZ/G2L does not have a version register, so added a
new compatible string "renesas,r9a07g044-vsp2" with a data pointer
containingthe info structure. Also the reset line is shared with the
DU module.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
v7->v8:
 * Split the patch for adding s/w version, feature bit and RZ/G2L support
 * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
 * Added .soc for RZ/G2L
 * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-vsp2"
v6->v7:
 * Added Rb tag from Kieran
 * Added a quirk to handle LIF0 buffer attribute related
   changes for V3M and G2L.
 * Removed the macro for VSP HW version
v5->v6:
 * Rebased to media_staging and updated commit header
 * Removed the extra tab from rzg2l_vsp2_device_info
 * Changed the function vsp1_lookup->vsp1_lookup_info and
   all info match related code moved here.
 * Add VI6_IP_VERSION_VSP and VI6_IP_VERSION_VSP_SW macros to
   distinguish HW & SW IP_VSP_Version.
 * Used 0x80 for RZG2L VSPD model and SoC identification
 * Updated Switch() for LIF0 buffer attribute handling.
v4->v5:
 * Fixed typo VI6_IP_VERSION_MODEL_MASK->VI6_IP_VERSION_MASK
 * To be consistent with other SoC's, introduced VI6_IP_VERSION_SOC_G2L
   for RZ/G2L SoC's.
v3->v4:
 * Added Rb tag from Geert
 * Add switch() for LIF0 buffer attribute handling for RZ/G2L and V3M
v2->v3:
 * Fixed version comparison in vsp1_lookup()
v1->v2:
 * Changed the compatible from vsp2-rzg2l->rzg2l-vsp2
 * Added standalone device info for rzg2l-vsp2.
 * Added vsp1_lookup helper function.
 * Updated comments for LIF0 buffer attribute register
 * Used last ID for rzg2l-vsp2.
RFC->v1:
 * Used data pointer containing info structure to retrieve version information
RFC:
 * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-21-biju.das.jz@bp.renesas.com/
---
 drivers/media/platform/renesas/vsp1/vsp1_drv.c  | 13 +++++++++++++
 drivers/media/platform/renesas/vsp1/vsp1_lif.c  |  9 +++++----
 drivers/media/platform/renesas/vsp1/vsp1_regs.h |  4 ++++
 3 files changed, 22 insertions(+), 4 deletions(-)

Comments

Geert Uytterhoeven April 27, 2022, 12:46 p.m. UTC | #1 
Hi Biju,

On Tue, Apr 19, 2022 at 8:18 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> The RZ/G2L VSPD provides a single VSPD instance. It has the following
> sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.
>
> The VSPD block on RZ/G2L does not have a version register, so added a
> new compatible string "renesas,r9a07g044-vsp2" with a data pointer
> containingthe info structure. Also the reset line is shared with the
> DU module.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
> v7->v8:
>  * Split the patch for adding s/w version, feature bit and RZ/G2L support
>  * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
>  * Added .soc for RZ/G2L
>  * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-vsp2"

Thanks for the update!

> --- a/drivers/media/platform/renesas/vsp1/vsp1_regs.h
> +++ b/drivers/media/platform/renesas/vsp1/vsp1_regs.h
> @@ -767,6 +767,8 @@
>  #define VI6_IP_VERSION_MODEL_VSPDL_GEN3        (0x19 << 8)
>  #define VI6_IP_VERSION_MODEL_VSPBS_GEN3        (0x1a << 8)
>  #define VI6_IP_VERSION_MODEL_VSPD_V3U  (0x1c << 8)
> +/* RZ/G2L SoC's have no version register, So use 0x80 as the model version */

RZ/G2L SoCs

> +#define VI6_IP_VERSION_MODEL_VSPD_RZG2L        (0x80 << 8)
>
>  #define VI6_IP_VERSION_SOC_MASK                (0xff << 0)
>  #define VI6_IP_VERSION_SOC_H2          (0x01 << 0)
> @@ -780,6 +782,8 @@
>  #define VI6_IP_VERSION_SOC_M3N         (0x04 << 0)
>  #define VI6_IP_VERSION_SOC_E3          (0x04 << 0)
>  #define VI6_IP_VERSION_SOC_V3U         (0x05 << 0)
> +/* RZ/G2L SoC have no version register, So use 0x80 for SoC Identification */

RZ/G2L SoCs

> +#define VI6_IP_VERSION_SOC_RZG2L       (0x80 << 0)
>
>  #define VI6_IP_VERSION_VSP_SW          (0xfffe << 16) /* SW VSP version */

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Biju Das April 27, 2022, 1:26 p.m. UTC | #2 
Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v8 5/5] media: renesas: vsp1: Add support for RZ/G2L
> VSPD
> 
> Hi Biju,
> 
> On Tue, Apr 19, 2022 at 8:18 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > The RZ/G2L VSPD provides a single VSPD instance. It has the following
> > sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF.
> >
> > The VSPD block on RZ/G2L does not have a version register, so added a
> > new compatible string "renesas,r9a07g044-vsp2" with a data pointer
> > containingthe info structure. Also the reset line is shared with the
> > DU module.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > ---
> > v7->v8:
> >  * Split the patch for adding s/w version, feature bit and RZ/G2L
> > support
> >  * Added feature bit VSP1_HAS_NON_ZERO_LBA to device_info
> >  * Added .soc for RZ/G2L
> >  * Replaced the compatible "renesas,rzg2l-vsp2" -> "renesas,r9a07g044-
> vsp2"
> 
> Thanks for the update!
> 
> > --- a/drivers/media/platform/renesas/vsp1/vsp1_regs.h
> > +++ b/drivers/media/platform/renesas/vsp1/vsp1_regs.h
> > @@ -767,6 +767,8 @@
> >  #define VI6_IP_VERSION_MODEL_VSPDL_GEN3        (0x19 << 8)
> >  #define VI6_IP_VERSION_MODEL_VSPBS_GEN3        (0x1a << 8)
> >  #define VI6_IP_VERSION_MODEL_VSPD_V3U  (0x1c << 8)
> > +/* RZ/G2L SoC's have no version register, So use 0x80 as the model
> > +version */
> 
> RZ/G2L SoCs

OK. 

> 
> > +#define VI6_IP_VERSION_MODEL_VSPD_RZG2L        (0x80 << 8)
> >
> >  #define VI6_IP_VERSION_SOC_MASK                (0xff << 0)
> >  #define VI6_IP_VERSION_SOC_H2          (0x01 << 0)
> > @@ -780,6 +782,8 @@
> >  #define VI6_IP_VERSION_SOC_M3N         (0x04 << 0)
> >  #define VI6_IP_VERSION_SOC_E3          (0x04 << 0)
> >  #define VI6_IP_VERSION_SOC_V3U         (0x05 << 0)
> > +/* RZ/G2L SoC have no version register, So use 0x80 for SoC
> > +Identification */
> 
> RZ/G2L SoCs

OK, as it is applicable to both RZ/G2L and RZ/G2LC SoCs.

Regards,
biju

> 
> > +#define VI6_IP_VERSION_SOC_RZG2L       (0x80 << 0)
> >
> >  #define VI6_IP_VERSION_VSP_SW          (0xfffe << 16) /* SW VSP version
> */
>
diff mbox series

Patch

diff --git a/drivers/media/platform/renesas/vsp1/vsp1_drv.c b/drivers/media/platform/renesas/vsp1/vsp1_drv.c
index 181f2ed8604b..2a5122e0bc52 100644
--- a/drivers/media/platform/renesas/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/renesas/vsp1/vsp1_drv.c
@@ -824,6 +824,18 @@  static const struct vsp1_device_info vsp1_device_infos[] = {
 	},
 };
 
+static const struct vsp1_device_info rzg2l_vsp2_device_info = {
+	.version = VI6_IP_VERSION_MODEL_VSPD_RZG2L,
+	.model = "VSP2-D",
+	.soc = VI6_IP_VERSION_SOC_RZG2L,
+	.gen = 3,
+	.features = VSP1_HAS_BRS | VSP1_HAS_WPF_VFLIP | VSP1_HAS_EXT_DL
+		  | VSP1_HAS_NON_ZERO_LBA,
+	.lif_count = 1,
+	.rpf_count = 2,
+	.wpf_count = 1,
+};
+
 static const struct vsp1_device_info *vsp1_lookup_info(struct vsp1_device *vsp1)
 {
 	const struct vsp1_device_info *info;
@@ -978,6 +990,7 @@  static int vsp1_remove(struct platform_device *pdev)
 static const struct of_device_id vsp1_of_match[] = {
 	{ .compatible = "renesas,vsp1" },
 	{ .compatible = "renesas,vsp2" },
+	{ .compatible = "renesas,r9a07g044-vsp2", .data = &rzg2l_vsp2_device_info },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, vsp1_of_match);
diff --git a/drivers/media/platform/renesas/vsp1/vsp1_lif.c b/drivers/media/platform/renesas/vsp1/vsp1_lif.c
index 9adb892edcdc..186a5730e1e3 100644
--- a/drivers/media/platform/renesas/vsp1/vsp1_lif.c
+++ b/drivers/media/platform/renesas/vsp1/vsp1_lif.c
@@ -107,6 +107,7 @@  static void lif_configure_stream(struct vsp1_entity *entity,
 
 	case VI6_IP_VERSION_MODEL_VSPDL_GEN3:
 	case VI6_IP_VERSION_MODEL_VSPD_V3:
+	case VI6_IP_VERSION_MODEL_VSPD_RZG2L:
 		hbth = 0;
 		obth = 1500;
 		lbth = 0;
@@ -130,10 +131,10 @@  static void lif_configure_stream(struct vsp1_entity *entity,
 			VI6_LIF_CTRL_REQSEL | VI6_LIF_CTRL_LIF_EN);
 
 	/*
-	 * On R-Car V3M the LIF0 buffer attribute register has to be set to a
-	 * non-default value to guarantee proper operation (otherwise artifacts
-	 * may appear on the output). The value required by the manual is not
-	 * explained but is likely a buffer size or threshold.
+	 * On R-Car V3M and RZ/G2L the LIF0 buffer attribute register has to be
+	 * set to a non-default value to guarantee proper operation (otherwise
+	 * artifacts may appear on the output). The value required by the
+	 * manual is not explained but is likely a buffer size or threshold.
 	 */
 	if (vsp1_feature(entity->vsp1, VSP1_HAS_NON_ZERO_LBA))
 		vsp1_lif_write(lif, dlb, VI6_LIF_LBA,
diff --git a/drivers/media/platform/renesas/vsp1/vsp1_regs.h b/drivers/media/platform/renesas/vsp1/vsp1_regs.h
index 4286d13eca32..599db4a20b7f 100644
--- a/drivers/media/platform/renesas/vsp1/vsp1_regs.h
+++ b/drivers/media/platform/renesas/vsp1/vsp1_regs.h
@@ -767,6 +767,8 @@ 
 #define VI6_IP_VERSION_MODEL_VSPDL_GEN3	(0x19 << 8)
 #define VI6_IP_VERSION_MODEL_VSPBS_GEN3	(0x1a << 8)
 #define VI6_IP_VERSION_MODEL_VSPD_V3U	(0x1c << 8)
+/* RZ/G2L SoC's have no version register, So use 0x80 as the model version */
+#define VI6_IP_VERSION_MODEL_VSPD_RZG2L	(0x80 << 8)
 
 #define VI6_IP_VERSION_SOC_MASK		(0xff << 0)
 #define VI6_IP_VERSION_SOC_H2		(0x01 << 0)
@@ -780,6 +782,8 @@ 
 #define VI6_IP_VERSION_SOC_M3N		(0x04 << 0)
 #define VI6_IP_VERSION_SOC_E3		(0x04 << 0)
 #define VI6_IP_VERSION_SOC_V3U		(0x05 << 0)
+/* RZ/G2L SoC have no version register, So use 0x80 for SoC Identification */
+#define VI6_IP_VERSION_SOC_RZG2L	(0x80 << 0)
 
 #define VI6_IP_VERSION_VSP_SW		(0xfffe << 16) /* SW VSP version */