| Message ID | 20220501111952.45872-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v2] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC | expand |
On Sun, 1 May 2022 12:19:52 +0100 Biju Das <biju.das.jz@bp.renesas.com> wrote: > ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL > has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, > added a new compatible to handle this difference. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v1->v2: > * Removed Items and used const for RZ/G2UL compatible > * Add allOf:if:then restricting available channels per SoC variant. > --- > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- > 1 file changed, 25 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > index d66c24cae1e1..d76c5ba3d625 100644 > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > @@ -17,11 +17,13 @@ description: | > > properties: > compatible: > - items: > - - enum: > - - renesas,r9a07g044-adc # RZ/G2L > - - renesas,r9a07g054-adc # RZ/V2L > - - const: renesas,rzg2l-adc > + oneOf: > + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL > + - items: > + - enum: > + - renesas,r9a07g044-adc # RZ/G2L > + - renesas,r9a07g054-adc # RZ/V2L > + - const: renesas,rzg2l-adc > > reg: > maxItems: 1 > @@ -76,10 +78,24 @@ patternProperties: > properties: > reg: > description: | > - The channel number. It can have up to 8 channels numbered from 0 to 7. > - items: > - - minimum: 0 > - maximum: 7 > + The channel number. It can have up to 8 channels numbered from 0 to 7 > + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL > + SoC. > + allOf: > + if: - if: properties: etc Otherwise I think you can only have one in your allOf: which rather removes the point of having one. I was surprised this passed the checks, so added another if to verify my reasoning... Jonathan > + properties: > + compatible: > + contains: > + enum: > + - renesas,renesas,r9a07g043-adc > + then: > + items: > + - minimum: 0 > + maximum: 1 > + else: > + items: > + - minimum: 0 > + maximum: 7 > > required: > - reg
Hi Biju, Thank you for the patch. > -----Original Message----- > From: Biju Das <biju.das.jz@bp.renesas.com> > Sent: 01 May 2022 12:20 > To: Jonathan Cameron <jic23@kernel.org>; Rob Herring <robh+dt@kernel.org>; > Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Biju Das <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad > <prabhakar.mahadev-lad.rj@bp.renesas.com>; Lars-Peter Clausen > <lars@metafoo.de>; linux-iio@vger.kernel.org; linux-renesas- > soc@vger.kernel.org; devicetree@vger.kernel.org; Geert Uytterhoeven > <geert+renesas@glider.be>; Chris Paterson <Chris.Paterson2@renesas.com>; > Biju Das <biju.das@bp.renesas.com> > Subject: [PATCH v2] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC > > ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL > has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, > added a new compatible to handle this difference. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v1->v2: > * Removed Items and used const for RZ/G2UL compatible > * Add allOf:if:then restricting available channels per SoC variant. > --- > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- > 1 file changed, 25 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l- > adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l- > adc.yaml > index d66c24cae1e1..d76c5ba3d625 100644 > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > @@ -17,11 +17,13 @@ description: | > > properties: > compatible: > - items: > - - enum: > - - renesas,r9a07g044-adc # RZ/G2L > - - renesas,r9a07g054-adc # RZ/V2L > - - const: renesas,rzg2l-adc > + oneOf: > + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL renesas,r9a07g043-adc # RZ/G2UL ? We need to decide if this needs to be separate elements or part of below enum depending on the driver change. > + - items: > + - enum: > + - renesas,r9a07g044-adc # RZ/G2L > + - renesas,r9a07g054-adc # RZ/V2L > + - const: renesas,rzg2l-adc > > reg: > maxItems: 1 > @@ -76,10 +78,24 @@ patternProperties: > properties: > reg: > description: | > - The channel number. It can have up to 8 channels numbered from > 0 to 7. > - items: > - - minimum: 0 > - maximum: 7 > + The channel number. It can have up to 8 channels numbered from > 0 to 7 > + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for > RZ/G2UL > + SoC. This comment is not required as we already have the below hunk where it mentions for RZ/G2UL its two channel. > + allOf: > + if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,renesas,r9a07g043-adc renesas,r9a07g043-adc Cheers, Prabhakar > + then: > + items: > + - minimum: 0 > + maximum: 1 > + else: > + items: > + - minimum: 0 > + maximum: 7 > > required: > - reg > -- > 2.25.1
On Sun, May 01, 2022 at 07:17:05PM +0100, Jonathan Cameron wrote: > On Sun, 1 May 2022 12:19:52 +0100 > Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL > > has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, > > added a new compatible to handle this difference. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v1->v2: > > * Removed Items and used const for RZ/G2UL compatible > > * Add allOf:if:then restricting available channels per SoC variant. > > --- > > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- > > 1 file changed, 25 insertions(+), 9 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > index d66c24cae1e1..d76c5ba3d625 100644 > > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > @@ -17,11 +17,13 @@ description: | > > > > properties: > > compatible: > > - items: > > - - enum: > > - - renesas,r9a07g044-adc # RZ/G2L > > - - renesas,r9a07g054-adc # RZ/V2L > > - - const: renesas,rzg2l-adc > > + oneOf: > > + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL > > + - items: > > + - enum: > > + - renesas,r9a07g044-adc # RZ/G2L > > + - renesas,r9a07g054-adc # RZ/V2L > > + - const: renesas,rzg2l-adc > > > > reg: > > maxItems: 1 > > @@ -76,10 +78,24 @@ patternProperties: > > properties: > > reg: > > description: | > > - The channel number. It can have up to 8 channels numbered from 0 to 7. > > - items: > > - - minimum: 0 > > - maximum: 7 > > + The channel number. It can have up to 8 channels numbered from 0 to 7 > > + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL > > + SoC. > > + allOf: > > + if: > - if: > properties: > etc > > Otherwise I think you can only have one in your allOf: which rather > removes the point of having one. > > I was surprised this passed the checks, so added another if to verify my > reasoning... It didn't apply, so checks didn't run. But it should fail not for the reason you correctly identified, but because 'allOf' is a DT property here not json-schema vocabulary. Rob
diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml index d66c24cae1e1..d76c5ba3d625 100644 --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml @@ -17,11 +17,13 @@ description: | properties: compatible: - items: - - enum: - - renesas,r9a07g044-adc # RZ/G2L - - renesas,r9a07g054-adc # RZ/V2L - - const: renesas,rzg2l-adc + oneOf: + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL + - items: + - enum: + - renesas,r9a07g044-adc # RZ/G2L + - renesas,r9a07g054-adc # RZ/V2L + - const: renesas,rzg2l-adc reg: maxItems: 1 @@ -76,10 +78,24 @@ patternProperties: properties: reg: description: | - The channel number. It can have up to 8 channels numbered from 0 to 7. - items: - - minimum: 0 - maximum: 7 + The channel number. It can have up to 8 channels numbered from 0 to 7 + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL + SoC. + allOf: + if: + properties: + compatible: + contains: + enum: + - renesas,renesas,r9a07g043-adc + then: + items: + - minimum: 0 + maximum: 1 + else: + items: + - minimum: 0 + maximum: 7 required: - reg
ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, added a new compatible to handle this difference. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v1->v2: * Removed Items and used const for RZ/G2UL compatible * Add allOf:if:then restricting available channels per SoC variant. --- .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- 1 file changed, 25 insertions(+), 9 deletions(-)